Liquid crystal driving device, liquid crystal display device, analog buffer, and liquid crystal driving method

ABSTRACT

A video signal is sampled by sequential switches (104), etc. and the voltage held in capacitors (150) after passing through switches (110). Next, switches (120), (130) turn on, the hold for capacitor (152) is carried out, and that voltage buffered by analog buffer (170), then output. The switch on-off control is performed by means of lines L1 and L2. The control of the supply voltage is performed by V1 +   to V4 + , and the polarity of analog buffers (170), (172), etc. is controlled. By means of the switch on-off control and the supply voltage control, four driving methods for alternating liquid crystal driving can be realized. Further, the analog buffers are composed of TFTs; and positive and negative polarity inversion can be performed through supply voltage shift.

FIELD OF TECHNOLOGY

This invention pertains to a driving method for a liquid crystal paneland, in particular, a driving method for a TFT liquid crystal panel.

BACKGROUND TECHNOLOGY

A number of different driving methods for TFT liquid crystal panels arealready known. For example, as stated in "Driver LSI Problems Solved bylow Voltage Single Power Supply", Flat Panel Display 1991 (Nov. 26,1990, Nikkei Business Publications, Inc., p. 168 to p. 172), TFT liquidcrystal panel drivers (liquid crystal driving devices) can be broadlydivided into two types: digital and analog. The typical structure of aconventional analog line sequential driver is shown in FIG. 38. Thisconventional driver contains shift register 2000, level shifter 2002,switches (analog switches) 2004 to 2018, sampling capacitors 2020 to2026, hold capacitors 2028 to 2034, and analog buffers 2036 to 2042.Shift register 2000 shifts in synchronization with the shift clock, theoutput is input into level shifter 2002, and the voltage is shifted.Switches 2004 to 2010 are sequentially turned off (opened) based on theoutput of level shifter 2002, resulting in the sequential sampling ofvideo signals by capacitors 2020 to 2026. When video signal sampling isfinished, the output enable signal becomes valid and switches 2012 to2018 simultaneously turn on (close). When this happens, the sampledvoltages are held by capacitors 2028 to 2034 through capacitive couplingbetween capacitors. The voltage that is held is then buffered by analogbuffers 2036 to 2042 and is output to the signal lines of the liquidcrystal panel as display signals. Analog buffers 2036 to 2042 areconstructed, for example, by connecting operational amplifiers tovoltage followers.

The configuration of the pixel region of the liquid crystal panel isshown in FIG. 39. Signal line 2050 is connected to the source region ofTFT (Thin Film Transistor) 2054, scan line 2052 is connected to the gateelectrode of TFT 2054, and pixel electrode 2054 is connected to thedrain region of TFT 2054. When TFT 2054 is selected by scan line 2052,the voltage difference between the voltage applied to pixel electrode2056 and the counter voltage (common voltage) applied to the counterelectrode is supplied to liquid crystal element 2058, thereby drivingliquid crystal element 2058.

Liquid crystal elements degrade when direct current voltage is appliedto them for extended periods. This property makes necessary a drivingmeans in which the polarity of the voltage applied to the liquid crystalelements is inverted after a specified period of time. As shown in FIG.40A to FIG. 40D, such known driving methods include frame inversiondriving (hereafter referred to as "1V inversion driving" for the sake ofconvenience), scan line inversion driving (hereafter referred to as "1Hinversion driving" for the sake of convenience), signal line inversiondriving (hereafter referred to as "1S inversion driving" for the sake ofconvenience), and dot inversion driving (hereafter referred to as "1H+1Sinversion driving" for the sake of convenience).

In 1V inversion driving, as shown in FIG. 40A, the polarity of theapplied voltage in all pixels is the same within a single verticalscanning period (1 field, 1 frame); and the polarity of all pixels isinverted after each vertical scanning period. While 1V inversion drivinghas the advantage of having driver circuits that are simple and easy tocontrol and, moreover, does not suffer from line nonuniformity, thisdriving means does suffer from extremely conspicuous screen flicker.

In 1H inversion driving, as shown in FIG. 40B, the polarity of theapplied voltage differs for each scan line; and, under these conditions,polarity is inverted after each vertical scanning period. The advantageof 1H inversion driving is that flicker is not conspicuous andcross-talk in the vertical direction is inhibited. Conversely, however,it suffers from the drawbacks of susceptibility to horizontal cross-talkand visible horizontal stripes in video displays. This driving method isparticularly effective when employing non-linear active elements (suchas polycrystalline TFTs and MIMs, for example) with large off leakagecurrents. Large liquid crystal panels, however, suffer from a brightnessgradient problem caused by parasitic resistance of the interconnectelectrodes. The brightness gradient problem cannot be solved by means of1H inversion driving.

In 1S inversion driving, as shown in FIG. 40C, the polarity of theapplied voltage differs for each signal line; and, under theseconditions, polarity is inverted after each vertical scanning period.The advantage of 1S inversion driving is that flicker is not conspicuousand cross-talk in the horizontal direction is inhibited. Conversely,however, it suffers from the drawbacks of susceptibility to verticalcross-talk and visible vertical stripes in video displays. Although itis possible solve the brightness gradient problem mentioned above, usingelements which have large off leakage currents leads to undesirableeffects.

In 1H+1S inversion driving, the polarity of the applied voltage differsfor each pixel; and, under these conditions, polarity is inverted aftereach vertical scanning period. 1H+1S inversion driving is disclosed in,for example, "A 13-inch EWS High-Definition TFT Liquid Crystal PanelWith Improved Picture Quality by Means of Dot Inversion Driving", FlatPanel Display 1993 (Dec. 10, 1992, Nikkei Business Publications, Inc.,pages 120 to 123). This method has the advantages of both 1H inversiondriving and 1S inversion driving; it also has the drawbacks of both.Further, the realization of this method means that the configuration andcontrol of the driver circuits become extremely complex, thus creatingthe disadvantages of longer design times and higher device costs.

As described above, each of the said four driving methods has bothadvantages and disadvantages. Hence, the question of which of these fourdriving methods to use is determined by considering such things as thetype and performance of non-linear active elements, the size of theliquid crystal panel, the targeted display quality, the cost of thedevice, and a variety of other design conditions. However, these designconditions are sometimes changed in the development process; and achange in any of the said design conditions after one of the said fourmethods has already been adopted will also necessitate a change in thedriving method, a matter that requires tremendous labor for circuitchanges and such. Therefore, a liquid crystal driver that can easilyaccommodate these types of design changes is desirable.

If a liquid crystal driver is to be supplied as a standard device, itshould have a high degree of general versatility so that it mayaccommodate all users. Users of liquid crystal drivers, however, employa variety of driving methods, such as those above. In addition to thevariety of driving methods, moreover, is a wide variety of performance(operating speed, number of signal lines, etc.) requirements for liquidcrystal drivers. Consequently, it has been difficult to supply a highlyversatile, standard liquid crystal driver capable of answering thedemands of all users. Yet this problem could also be solved if one wereable to offer a liquid crystal driver that realizes all four of the saiddriving methods on one device without unduly enlarging the circuit.

In addition, analog buffers 2036 to 2042 (see FIG. 38), which are usedin the liquid crystal driver, need to have a wide output voltage range(operating range). This is because a wide output voltage rangefacilitates the making of a liquid crystal panel capable of displayingmultiple gray-scale levels. To obtain a wide output voltage range, it isnecessary to widen the range of the supply voltage that is supplied tothe analog buffers. However, to achieve this, a manufacturing processwhose breakdown voltage is high must be used, which leads to theproblems of increased circuit size and higher costs. For example,Japanese Unexamined Patent Application Heisei 6-222741 disclosestechnology of the prior art which generates a high quality display inmultiple gray-scales levels using low voltage drivers. In the technologyof the prior art, however, liquid crystal drivers and other peripheralcircuits are not integrated on the liquid crystal panel, and analogbuffers are comprised not of TFTs but of single crystal CMOStransistors. In addition, the characteristics of analog bufferscomprised of TFTs, and those of analog buffers comprised of singlecrystal CMOS transistors differ in various respects, including suchthings as the width of the linear region in input-outputcharacteristics, allowable supply voltage ranges, and offset values.Therefore, even if the said technology of the prior art were applied toan analog buffer comprised of TFTs, a high quality display havingmultiple gray-scales could not be obtained. In addition, there has beenabsolutely no disclosure in the said technology of the prior artregarding the idea for a liquid crystal driver capable of using the fourdriving methods together; and, moreover, the said technology of theprior art is related to digital liquid crystal drivers, not to analogline sequential drivers.

In addition, analog buffers contained in liquid crystal drivers areprovided for each individual signal line of the liquid crystal panel,making the number of buffers extremely large. For example, a 480×640 dotfull-color liquid crystal panel requires a minimum of 640×3 analogbuffers. Also, since analog buffers pass electric current fromintegrated constant current supplies, there is the additional problem offinding a way to hold the current consumption of the analog buffers at alow level in order to reduce the power consumption of the overalldevice.

The present invention was designed to resolve the problems describedabove, and it is aimed at the realization of multiple driving methodswhich can invert the polarity of voltage applied to liquid crystalelements without unduly increasing the size of circuits in the liquidcrystal driving device.

Another of the aims for the present invention is the realization of ananalog buffer which is comprised of TFTs and which can switch betweenpositive polarity and negative polarity by means of a shift in thesupply voltage.

Yet another of the aims for the present invention is to hold the currentconsumption of the analog buffers to a low level and achieve low powerconsumption.

DESCRIPTION OF THE INVENTION

In order to resolve the problems mentioned above, the liquid crystaldriving device of this invention drives liquid crystal elements arrayedin a matrix by supplying a voltage to a liquid crystal element, to theother side of which is supplied a counter voltage;

and is characterized by the inclusion of 1 to N (N is an integer) signaldriving means, which include a means for sequentially sampling andholding video signals; multiple analog buffers, to which are appliedhigh and low supply voltages, for buffering the sample and holdvoltages; and selection means for selecting any output from the saidmultiple buffers;

a supply voltage control means both for controlling the values of thesaid high potential supply voltage and the said low potential supplyvoltage which are supplied to the said analog buffers, as well as forshifting the range of the output voltage of the said analog buffers toeither high potential or low potential, using the said counter voltageas a reference;

and a selection control means for controlling the selection by the saidselection means of any output of the said analog buffers in which theoutput voltage range was shifted by said supply voltage control means.

According to this invention, the range of output voltage of the multipleanalog buffers is shifted to either high potential or low potential,using the counter voltage as a reference. Then, any of the outputs ofthese multiple analog buffers is selected; and liquid crystal elementsare driven. Therefore, depending on the combination of the polarity ofthe output voltage range of the analog buffers and the method ofselection, it becomes possible to change the polarity of voltage appliedto the liquid crystal with each scan line, each signal line, eachhorizontal scanning period, or each vertical scanning period, thusenabling the realization of multiple driving methods in a single liquidcrystal driving device; and thereby realizing, without unduly increasingthe size of the circuits, the optimum liquid crystal driving device inthe form of a highly versatile, standard device which is capable ofeasily accommodating such things as design changes.

This invention is a liquid crystal driving device that drives liquidcrystal elements arrayed in a matrix by supplying a voltage to a liquidcrystal element, to the other side of which is supplied a countervoltage;

and is characterized by the inclusion of 1 to N (N is an integer) signaldriving means which include a means for sequentially sampling andholding video signals, a first and second switching means, a firstanalog buffer which buffers and outputs voltage which is transmitted viathe said first switching means, a second analog buffer which buffers andoutputs voltage which is transmitted via the said second switchingmeans, a third switching means which is connected to output of the saidfirst analog buffer and which turns on and off in conjunction with thesaid second switching method, and a fourth switching means which isconnected to the output of the said second analog buffer and which turnson and off in conjunction with the said first switching method;

a supply voltage control means which controls the values of the highpotential supply voltage and the low potential supply voltage which aresupplied to the said first and second analog buffers and which shiftsthe range of the output voltage of the said first and second analogbuffers to either high potential or low potential, using the saidcounter voltage as a reference;

and a switch control means which controls the on-off operations of thesaid first through fourth switching means.

According to this invention, the sampled video signals are input andheld in the first and second analog buffers via the first and secondswitching means. Then, the range of output voltage of the first andsecond analog buffers is shifted to either high potential or lowpotential, using the counter voltage as a reference. Next, either of theoutputs of the first and second analog buffers is selected and drivingis performed with respect to the liquid crystal elements. Therefore,depending on the combination of the polarity of the output voltage rangeof the first and second analog buffers, it becomes possible to changethe polarity of voltage applied to the liquid crystal with each scanline, each signal line, each horizontal scanning period, or eachvertical scanning period, thus enabling the realization of multipledriving methods in a single liquid crystal driving device. Alsoaccording to this invention, it is possible to perform sample-and-holdoperations using the entire horizontal scanning period, thus making itpossible to raise the accuracy and speed of sample-and-hold operations.

This invention is also characterized by the fact that frame inversiondriving is performed by switching the shift directions of the saidoutput voltage range of the said first and second analog buffers everyvertical scanning period by controlling the said supply voltage controlmeans.

According to this invention, the polarity of the voltage applied to allthe liquid crystal elements is inverted each vertical scanning period (1field, 1 frame), thereby making frame inversion driving possible andenabling suppression of line nonuniformity.

This invention is also characterized by the fact that scan lineinversion driving is performed by making the shift directions of theoutput voltage range of the said first and second analog buffers, whichare included in a single said signal driving means, differ from oneanother via control of the said supply voltage control means and byswitching the on-off sequence of the said first through fourth switchingmeans each vertical scanning period via control of the said switchcontrol means.

This invention is also characterized by the fact that scan lineinversion driving is performed by making the shift directions of theoutput voltage range of the said first and second analog buffers, whichare included in a single said signal driving means, differ from oneanother via control of the said supply voltage control means and byswitching the shift directions of the output voltage range of the saidfirst and second analog buffers each vertical scanning period.

According to these inventions, the polarity of applied voltage differswith each scan line and polarity inversion takes place under theseconditions each vertical scanning period, thereby realizing scan lineinversion driving. This is capable of preventing liquid crystal panelflicker and vertical cross-talk and, moreover, can prevent verticalstripes from occurring in video display. This invention is particularlyeffective when employing nonlinear active elements (such aspolycrystalline TFTs and MIMs, for example) with large off leakagecurrents. In addition, flicker can also be suppressed to a lower levelthan is possible in signal line inversion driving.

This invention is also characterized by the fact that signal lineinversion driving is performed by making the shift directions of theoutput voltage range of the said first and second analog buffers, whichare included in a single said signal driving means, the same whilemaking the shift directions of the output voltage range of the saidfirst and second analog buffers, which are included in the adjacent saidsignal driving means, different, and by switching the shift directionsof the output voltage range of the said first and second analog bufferseach vertical scanning period.

According to this invention, the polarity of applied voltage differs foreach signal line and polarity is inverted under these conditions eachvertical scanning period, thereby realizing signal line inversiondriving. This enables the prevention of liquid crystal panel flicker andhorizontal cross-talk and, moreover, can prevent horizontal stripes fromoccurring in video display. In particular, this invention solves thebrightness gradient problem caused by parasitic resistance of theinterconnect electrodes, and, thus, achieves a liquid crystal drivingdevice that is optimally suited to large liquid crystal panels.

This invention is also characterized by the fact that dot inversiondriving is performed by making the shift directions of the outputvoltage range of the said first and second analog buffers, which areincluded in a single said signal driving means, differ from one anothervia control of the said supply voltage control means; while also makingthe shift directions of the output voltage range of the said first andsecond analog buffers, which are included in the adjacent said signaldriving means, differ from one another; and by switching the on-offsequence of the said first through fourth switching means each verticalscanning period via control of the said switch control means.

This invention is also characterized by the fact that dot inversiondriving is performed by making the shift directions of the outputvoltage range of the said first and second analog buffers, which areincluded in a single said signal driving means, differ from one anothervia control of the said supply voltage control means; while also makingthe shift directions of the output voltage range of the said first andsecond analog buffers, which are included in the adjacent said signaldriving means, differ from one another; and switching the shiftdirections of the output voltage range of the said first and secondanalog buffers each vertical scanning period.

This invention is also characterized by the fact that dot inversiondriving is performed by making the shift directions of the outputvoltage range of the said first and second analog buffers, which areincluded in a single said signal driving means, differ from one anothervia control of the said supply voltage control means; making the on-offsequence of the said first through fourth switching means, which areincluded in the adjacent said signal driving means, differ via controlof the said switch control means; and switching the on-off sequence ofthe said first through fourth switching means each vertical scanningperiod.

This invention is also characterized by the fact that dot inversiondriving is performed by making the shift directions of the outputvoltage range of the said first and second analog buffers, which areincluded in a single said signal driving means, differ from one anothervia control of the said supply voltage control means; switching theshift directions of the output voltage range of the said first andsecond analog buffers each vertical scanning period; and making theon-off sequences of the said first through fourth switching means, whichare included in the adjacent said signal driving means, different fromone another via control of the said switch control means.

According to these inventions, the polarity of applied voltage differsfor each pixel and polarity is inverted each vertical scanning periodunder these conditions, thereby realizing dot inversion driving, whichcan prevent liquid crystal panel flicker as well as horizontal andvertical cross-talk. This invention also solves the brightness gradientproblem caused by parasitic resistance of interconnect electrodes, and,moreover, can decrease power consumption of the circuit which generatesthe counter voltage since there is little exchange of current withexternal circuits.

This invention is characterized by the fact that the said supply voltagecontrol means includes a means for controlling

a first supply line, which supplies high potential supply voltage andlow potential supply voltage to the said first analog buffer, which isincluded in the (2K-1) (K is an integer) signal driving means;

a second supply line, which supplies high potential supply voltage andlow potential supply voltage to the said second analog buffer, which isincluded in the (2K-1) signal driving means;

a third supply line, which supplies high potential supply voltage andlow potential supply voltage to the said first analog buffer, which isincluded in the 2K signal driving means;

a fourth supply line, which supplies high potential supply voltage andlow potential supply voltage to the said second analog buffer, which isincluded in the 2K signal driving means;

and the values of the high potential supply voltage and low potentialsupply voltage which are supplied to the said first through fourthsupply lines;

and by the fact that the said switch control means includes a means forcontrolling

switch control line 1, which controls the switching of said first andthird switching means;

switch control line 2, which controls the switching of the said secondand fourth switching means;

and the switch signals, which are supplied to the said switch controllines 1 and 2.

According to this invention, power is supplied to the first and secondanalog buffers, which are included in the odd-numbered signal drivingmeans, by the first and second supply lines, respectively; and issupplied to the first and second analog buffers, which are included inthe even-numbered signal driving means, by the third and fourth supplylines, respectively. Switching control of the first and third switchingmeans is achieved by switch control line 1, and switching control of thesecond and fourth switching means is achieved by switch control line 2.This enables the realization of a liquid crystal driving device forcombined frame inversion, scan line inversion, signal line inversion,and dot inversion driving.

This invention is also characterized by the fact that the said supplyvoltage control means includes a means for controlling

a supply line which supplies high potential supply voltage and lowpotential supply voltage to the first and second analog buffers

and the values of the high potential supply voltage and low potentialsupply voltage which are supplied to the said supply line;

and that said switch control means includes a means for controlling

switch control line 1, which controls the switching of the said firstand third switching means;

switch control line 2, which controls the switching of the said secondand fourth switching means;

and the switch signals which are supplied to the said switch controllines 1 and 2.

According to this invention, a single channel voltage is supplied to thefirst and second analog buffers using a supply line, while switchingcontrol of the first and third switching means is achieved by switchingcontrol line 1 and switching control of the second and fourth switchingmeans is achieved by switch control line 2. This enables the realizationof a liquid crystal driving device dedicated to frame inversion driving.

This invention is also characterized by the fact that the said supplyvoltage control means includes a means for controlling

a first supply line, which supplies high potential supply voltage andlow potential supply voltage to the said first analog buffer;

a second supply line, which supplies high potential supply voltage andlow potential supply voltage to the said second analog buffer;

and the values of the high potential supply voltage and low potentialsupply voltage which are supplied to the said first and second supplylines;

and by the fact that said switch control means includes a means forcontrolling

switch control line 1, which controls the switching of the said firstand third switching means;

switch control line 2, which controls the switching of the said secondand fourth switching means;

and the switch signals which are supplied to the said first and secondswitch control lines.

According to this invention, power is supplied to the first analogbuffer by the first supply line and to the second analog buffer by thesecond supply line, while switching control of the first and thirdswitching means is achieved by switch control line 1 and switchingcontrol of the second and fourth switching means is achieved by switchcontrol line 2. This enables the realization of a liquid crystal drivingdevice dedicated to scan line inversion driving.

This invention is also characterized by the fact that the said supplyvoltage control means includes a means for controlling

a first supply line, which supplies high potential supply voltage andlow potential supply voltage to the said first and second analogbuffers, which are included in the (2K-1) (K is an integer) signaldriving means;

a second supply line, which supplies high potential supply voltage andlow potential supply voltage to the said first and second analogbuffers, which are included in the 2K signal driving means;

and the values of the high potential supply voltage and low potentialsupply voltage which are supplied to the said first and second supplylines;

and by the fact that said switch control means includes a means forcontrolling

switch control line 1, which controls the switching of the said firstand third switching means;

switch control line 2, which controls the switching of the said secondand fourth switching means;

and the switch signals which are supplied to the said switch controllines 1 and 2.

According to this invention, power is supplied to the first and secondanalog buffers, which are included in the odd-numbered signal drivingmeans, by the first supply line, and to the first and second analogbuffers, which are included in the even-numbered signal driving means,by the second supply line. In addition, switching control of the firstand third switching means is achieved by switch control line 1; andswitching control of the second and fourth switching means is achievedby switch control line 2. This enables the realization of a liquidcrystal driving device dedicated to signal line inversion driving.

This invention is also characterized by the fact that the said supplyvoltage control means includes a means for controlling

a first supply line, which supplies high potential supply voltage andlow potential supply voltage to the said first analog buffer;

a second supply line, which supplies high potential supply voltage andlow potential supply voltage to the said second analog buffer;

and the values of the high potential supply voltage and low potentialsupply voltage which are supplied to the said first and second supplylines;

and by the fact that the said switch control means includes a means forcontrolling

switch control line 1, which controls the switching of the first andthird switching means, which are included in the (2K-1) (K is aninteger) signal driving means, and the switching of the second andfourth switching means, which are included in the 2K signal drivingmeans;

switch control line 1, which controls the switching of the first andthird switching means, which are included in the 2K signal drivingmeans, and the switching of the second and fourth switching means, whichare included in the (2K-1) signal driving means;

and the switch signals which are supplied to the said first and secondswitch control lines.

According to this invention, power is supplied to the first analogbuffer by the first supply line and to the second analog buffer by thesecond supply line. In addition, switching control of the first andthird switching means, which are included in the odd-numbered signaldriving means, and switching control of the second and fourth switchingmeans, which are included in the even-numbered signal driving means, areachieved by switch control line 1; switching control of the first andthird switching means, which are included in the even-numbered signaldriving means, and switching control of the second and fourth switchingmeans, which are included in the odd-numbered signal driving means, areachieved by switch control line 2. This enables the realization of aliquid crystal driving device dedicated to dot inversion driving.

This invention is also characterized by the fact that the said supplyvoltage control means includes a means for controlling

a first supply line, which supplies high potential supply voltage andlow potential supply voltage to the said first analog buffer;

a second supply line, which supplies high potential supply voltage andlow potential supply voltage to the said second analog buffer;

and the values of the high potential supply voltage and low potentialsupply voltage which are supplied to the said first and second supplylines;

and by the fact that the said switch control means includes a means forcontrolling

switch control line 1, which controls the switching of the first andthird switching means, which are included in the (2K-1) (K is aninteger) signal driving means;

switch control line 2, which controls the switching of the second andfourth switching means, which are included in the (2K-1) signal drivingmeans;

switch control line 3, which controls the switching of the first andthird switching means, which are included in the 2K signal drivingmeans;

switch control line 4, which controls the switching of the second andfourth switching means, which are included in the 2K signal drivingmeans;

the switch signals which are supplied to the said switch control lines 1through 4.

According to this invention, power is supplied to the first analogbuffer by the first supply line and to the second analog buffer by thesecond supply line. In addition, switching control of the first andthird switching means, which are included in the odd-numbered signaldriving means, is achieved by switch control line 1; switching controlof the second and fourth switching means, which are included in theodd-numbered signal driving means, is achieved by switch control line 2;switching control of the first and third switching means, which areincluded in the even-numbered signal driving means, is achieved byswitch control line 3; and switching control of the second and fourthswitching means, which are included in the even-numbered signal drivingmeans, is achieved by switch control line 4. This enables therealization of a liquid crystal driving device that can be used for bothscan line inversion and dot inversion driving.

This invention is also characterized by the inclusion of a scan drivingmeans which outputs select voltage to the scan lines in order to selectwhether or not to apply said applied voltage to said liquid crystalelements;

and by the fact that the said scan driving means enables the saidselection voltage by sequentially delaying the select voltage by exactlyone horizontal scanning period so that the said selection voltagebecomes effective when the said third switching means or said fourthswitching means becomes conductive after completion of thesample-and-hold in the first horizontal scanning period of the verticalscanning period.

According to this invention, an incorrect voltage is prevented frombeing applied to the liquid crystal element via the signal line at thestart of the vertical scanning period and, thus, an erroneous display isprevented.

This invention is also characterized by the fact that the said supplyvoltage control means includes a means for fixing at a prescribed valuethe said high potential supply voltage and low potential supply voltageat the time of the vertical blanking period.

According to this invention, the voltage of the analog buffer's highpotential side and low potential side is fixed at a prescribed valueduring the vertical blanking period, thereby halting the flow of currentvia the constant current supply in the analog buffer and achievingreduced power consumption. Because this processing takes place duringthe vertical blanking period, power consumption is reduced withoutaffecting the screen display in the liquid crystal panel.

This invention is also characterized by the fact that it is an analogbuffer comprised of thin film transistors which is supplied both a highpotential supply voltage and a low potential supply voltage and whichbuffers input voltage and outputs output voltage;

that it has a linear region in which the relationship of the said outputvoltage to the said input voltage is approximately linear;

and that it includes a supply voltage control means which controls thevalue of the said high potential supply voltage and said low potentialsupply voltage so that the amplitude of the said input voltage isincluded in the said linear region when the amplitude of the said inputvoltage shifts.

According to this invention, the value of the supply voltage on the highpotential side and low potential side is controlled in accordance withthe amplitude of the input voltage, thereby enabling the buffering ofinput voltage in the linear region and making such things as precisegray-scale display possible.

This invention is also characterized by the fact that it includes adifferential stage in which the said input voltage and said outputvoltage are input and in which the voltage difference between the inputvoltage in question and the output voltage in question is amplified andoutput;

and a driving means which has, at a minimum: an n-channel drivingtransistor in which the output of the said differential stage is inputto the gate electrode, and which outputs said output voltage from thedrain region;

and that the said supply voltage control means performs control whichshifts to the low potential side the value of the said high potentialsupply voltage and said low potential supply voltage so that when theamplitude of the said input voltage shifts to the low potential side thesaid amplitude is included in the said linear region which is located onthe high potential side.

According to this invention, the linear region is located on the highpotential side. So, by performing control so that the supply voltage isshifted to the low potential side and the amplitude of the input voltageis included in this linear region, it is possible to perform bufferingof the input voltage in the linear region.

This invention is also characterized by the fact that it includes adifferential stage in which the said input voltage and said outputvoltage are input and in which the voltage difference between the inputvoltage in question and output voltage in question is amplified andoutput;

and a driving means which has, at a minimum, a p-channel drivingtransistor in which the output of the said differential stage is inputby the gate electrode and which outputs said output voltage to the drainregion;

and that the said supply voltage control means performs control whichshifts to the high potential side the value of the said high potentialsupply voltage and said low potential supply voltage so that when theamplitude of the said input voltage shifts to the high potential side,the said amplitude is included in the said linear region which islocated on the low potential side.

According to this invention, the linear region is located on the lowpotential side. So, by performing control so that the supply voltage isshifted to the high potential side and the amplitude of the inputvoltage is included in this linear region, it is possible to performbuffering of the input voltage in the linear region.

This invention is also characterized by the inclusion of a means forcanceling the said analog buffer's offset value by adjusting the valueof the said counter voltage.

In this invention, the polarity of the analog buffer is switched merelyby controlling the supply voltage using an analog buffer of the sametype. Therefore, the offset value can be made the same value when theanalog buffer has positive polarity and when it has negative polarity.In this way the offset value can be canceled by adjusting the countervoltage, without distorting the video signal.

In addition, the liquid crystal display device associated with thisinvention is characterized by the inclusion of at least one of the saidliquid crystal driving devices as well as multiple signal lines whichare connected to a signal driving means of the said liquid crystaldriving device, multiple scan lines which intersect the said signallines, liquid crystal elements which are arrayed in a matrix, andmultiple thin film transistors for transmitting applied voltages to thesaid liquid crystal elements in question.

In this instance, one may include two liquid crystal driving devices inthe liquid crystal display device, connect the (2L-1) (L is an integer)signal lines to the signal driving means of one of the said liquidcrystal driving devices while connecting the 2L signal lines to thesignal driving means of the other said liquid crystal device, and makeit so that the output voltage range of the analog buffers selected inthe signal driving means connected to the (2L-1) signal lines is shiftedin the opposite direction, with reference to the counter voltage, withrespect to the output voltage range of the analog buffers selected inthe signal driving means connected to the 2L signal line. Thisimplementation makes it possible, for example, to achieve signal lineinversion driving using a liquid crystal driving device that is capableof frame inversion driving, or achieving dot inversion driving using aliquid crystal driving device that is capable of scan line inversiondriving.

Further, in a liquid crystal display device associated with thisinvention it is desirable that the said liquid crystal driving device beintegrated on the liquid crystal panel which is comprised by the saidthin film transistors, thereby enabling the display device to be mademore compact and at lower cost.

BRIEF EXPLANATION OF THE FIGURES

FIG. 1 is an example of the configuration of a liquid crystal driverassociated with Example 1 of this invention.

FIG. 2 is an example of a specific configuration of the liquid crystaldriver shown in FIG. 1.

FIG. 3 is an example of a specific configuration of the liquid crystaldriver shown in FIG. 1.

FIG. 4 is a timing chart for 1V inversion driving in Example 1.

FIG. 5 is used to explain the operation of the liquid crystal driver for1V inversion driving.

FIG. 6 is a timing chart for 1H inversion driving in Example 1.

FIG. 7 is used to explain the operation of the liquid crystal driver for1H inversion driving.

FIG. 8 is used to explain the operation of the liquid crystal driver for1H inversion driving.

FIG. 9 is a timing chart for 1S inversion driving in Example 1.

FIG. 10 is used to explain the operation of the liquid crystal driverfor 1S inversion driving.

FIG. 11 is a timing chart for 1H+1S inversion driving in Example 1.

FIG. 12 is used to explain the operation of the liquid crystal driverfor 1H+1S inversion driving.

FIG. 13 is used to explain the operation of the liquid crystal driverfor 1H+1S inversion driving.

FIG. 14 is an example of the configuration of Example 2 of thisinvention.

FIG. 15 is a timing chart for 1V inversion driving in Example 2.

FIG. 16 is an example of the configuration of Example 3 of thisinvention.

FIG. 17 is a timing chart for 1H inversion driving in Example 3.

FIG. 18 is an example of the configuration of Example 4 of thisinvention.

FIG. 19 is a timing chart for 1S inversion driving in Example 4.

FIG. 20 is an example of the configuration of Example 5 of thisinvention.

FIG. 21 is a timing chart for 1H+1S inversion driving in Example 5.

FIG. 22 is used to explain the operation of the liquid crystal driverfor 1H+1S inversion driving.

FIG. 23 is used to explain the operation of the liquid crystal driverfor 1H+1S inversion driving.

FIG. 24 is an example of the configuration of Example 6 of thisinvention.

FIG. 25 is a timing chart for 1H inversion driving in Example 6.

FIG. 26 is a timing chart for 1H+1S inversion driving in Example 6.

FIG. 27 is used to explain the configuration of other liquid crystaldrivers.

FIG. 28 is a timing chart for 1V inversion driving in a combined 1V/1Sdriver.

FIG. 29 is a timing chart for 1V inversion driving in a combined1V/1H/1H+1S driver.

FIG. 30 is an example of the configuration of a control circuit whichcontrols a liquid crystal driver.

FIG. 31 is an example of the overall configuration of a liquid crystalpanel containing a liquid crystal driver.

FIG. 32 is an example of the input-output characteristics of an analogbuffer.

FIG. 33A and FIG. 33B are examples of the configuration of a p-typeanalog buffer and an n-type analog buffer, respectively.

FIG. 34A, FIG. 34B, and FIG. 34C are used to explain the method forshifting supply voltage.

FIG. 35A and FIG. 35B are an example of the input-output characteristicsof a p-type analog buffer and an n-type analog buffer when the supplyvoltage is shifted.

FIG. 36 is used to explain the operation of an example in which 1Sinversion driving is achieved using two liquid crystal drivers.

FIG. 37 is used to explain the operation of an example in which 1H+1Sinversion driving is achieved using two liquid crystal drivers.

FIG. 38 is an example of the configuration of an analog line sequentialdriver of the prior art.

FIG. 39 shows the configuration of the pixel region of a liquid crystalpanel.

FIG. 40A, FIG. 40B, FIG. 40C, and FIG. 40D are used to explain 1V, 1H,1S, and 1H+1S inversion driving.

THE BEST SYSTEMS FOR IMPLEMENTING THE INVENTION

Using the accompanying figures, specific examples of the presentinvention will be described in detail below.

First Embodiment

FIG. 1 shows an example of the configuration of a liquid crystal driver(liquid crystal driving device) according to the first embodiment ofthis invention. The first embodiment concerns a combined 1V/1H/1S/1H+1Sliquid crystal driver. This liquid crystal driver is known as a sourcedriver which drives the signal lines and includes multiple (1 to N)signal driving means. For example, the first signal driving meansincludes switches (analog switches) 104, 110, 120, 130, 140; capacitors150 and 152; and analog buffers 170 and 172. The second signal drivingmeans includes switches 106, 112, 122, 132, 142; capacitors 154 and 156;and analog buffers 174 and 176. Additionally, the number of signal linesin FIG. 1 driven by the liquid crystal driver is, for the display ofcolor on a 640×480 dot liquid crystal panel, for example, 640×3. In thiscase, it is acceptable to provide multiple liquid crystal driver devicesto drive these signal lines, or it is also acceptable to locate liquidcrystal driver devices on the top and bottom edges of the liquid crystalpanel and alternately connect the signal line columns to the top andbottom drivers. Also, when displaying color, it is acceptable either toprovide three video signal lines for RGB use and connect these threevideo signal lines individually to sampling switches, or to usetime-division of the RGB video signals on one video line.

Shift register 100 shifts in synchronization with the shift clock, andthe output is fed into level shifter 102 for level shifting. Switches104 to 108 are turned off sequentially (opened) based on the output oflevel shifter 102, and sampling of the video signal is accomplished. Thesampled voltage is held in capacitors 150 to 160 after passing throughthe switches that are on among switches 110 to 114 and 120 to 124. Inthis way, switches 104 to 108 and capacitors 150 to 160 in the presentexample provide means to sequentially sample and hold the video signal.

Analog buffers 170 to 180, in the form of an operational amplifierconnected to a voltage follower for example, have the function ofbuffering and outputting the sampled and held voltages from capacitors150 to 160. For example, analog buffers 170, 174, and 178 (the firstanalog buffer) buffer and output the voltages transmitted by switches110 to 114 (the first switching means) while analog buffers 172, 176,and 180 (the second analog buffer) buffer and output the voltagestransmitted by switches 120 to 124 (the second switching means).

In order to select the outputs of analog buffers 170 to 180, switches130 to 134 (the third switching means) and switches 140 to 144 (thefourth switching means) which compose the selection means are connectedto the outputs of analog buffers 170 to 180. Then, the outputs of analogbuffers 170 to 180 are transmitted to the signal lines through theswitches that are on among switches 130 to 134 and 140 to 144.

Now, in this embodiment, the high potential and low potential supplyvoltage to analog buffers 170 to 180 is controlled; and, using thecounter voltage as a reference, shift control is achieved by shiftingthe range of the output voltage of analog buffers 170 to 180 to eitherhigh potential or low potential. This shift control is achieved bycontrolling, by means of supply voltage controller 202 (see FIG. 30),the high and low voltages applied to supply lines V1⁺ to V4⁺ and V1⁻ toV4⁻, respectively, which are connected to analog buffers 170 to 180.

Further, in this embodiment, selection control of the output of theanalog buffers, the output voltage range of which has been shifted, iscarried out through selection by switches 130 to 134 and 140 to 144(selection means). This selection control is achieved by controlling, bymeans of switch controller 206 (see FIG. 30), the voltages supplied toswitch control lines L1 and L2.

Next, control of switches 110 to 144 will be explained in detail. Inthis embodiment, the on-off operation of the first switch 110 (SW11) andthe fourth switch 140 (SW22) are coupled as are the on-off operation ofthe second switch 120 (SW21) and the third switch 130 (SW12). Thecontrol of the on-off operation of these switches is achieved throughthe switch controller 206 (see FIG. 30) connected to the first andsecond switch control lines L1 and L2. For example, in FIG. 1, when thesecond switch 120 is on (closed), the third switch 130 is also on.Consequently, at this time, the video signal voltage sampled by switch104 is held by capacitor 152 after passing through switch 120. Also, thevoltage held in capacitor 150 during the previous period is buffered byanalog buffer 170 and then output to the signal line by way of the thirdswitch 130. On the other hand, in the reverse case of that describedabove, when the second switch 120 is off, the third switch 130 is alsooff; and, at this time, the first and fourth switches 110 and 140,respectively, are on.

In the example of the prior art shown in FIG. 38, capacitors 2028 to2034 could be charged with sampling voltages only during the period whenthe output enable signal was in effect and switches 2012 to 2018 wereon. Additionally, it was necessary to have separate capacitors forsampling, 2020 to 2026, and holding, 2028 to 2034. In contrast, in thepresent embodiment, as explained above, by turning the switches on andoff alternately, the capacitors can charge using an entire horizontalscanning period thereby allowing the output of a precise display signalvoltage. Additionally, it is possible to use the same capacitors forboth sampling and holding.

FIGS. 2 and 3 show examples of specific configurations of the liquidcrystal driver shown in FIG. 1. In FIGS. 2 and 3, however, shiftregister 100, level shifter 102, and switches 104 to 108 shown in FIG. 1are omitted. As shown in FIGS. 2 and 3, switches 110 to 124 are composedof transmission-type transistors while switches 130 to 144 are composedof n-type transistors. Through the establishment of inverter circuits182 to 187 in FIG. 2 and the establishment of inverter circuits 188 and190 in FIG. 3, the configuration of the drivers guarantees that thefirst switch 110 and the third switch 130 (or the second switch 120 andthe fourth switch 140) cannot be on simultaneously. The construction ofFIG. 2 is advantageous in that the number of wiring connections toswitch control lines L1 and L2 can be decreased, and the construction ofFIG. 3 is advantageous in that the number of inverter circuits can bedecreased.

Next, the control of the supply voltage to the analog buffers will beexplained in detail. As shown in FIG. 1, in the present embodiment, afour-channel supply voltage can be supplied through four channels usingsupply lines V1⁺ to V4⁺ for high potentials and supply lines V1⁻ V4⁻ forlow potentials. In other words, voltages are supplied to the firstanalog buffers 170 and 178 included in the odd-numbered signal drivingmeans (the first and third signal driving means) through the firstsupply lines V1⁺ and V1⁻ ; voltages are supplied to the second analogbuffers 172 and 180 included in the odd-numbered signal line drivingmeans (the second signal driving means) through the second supply linesV2⁺ and V2⁻ ; voltages are supplied to the first analog buffer 174included in the even-numbered signal driving means through the thirdsupply lines V3⁺ and V3⁻ ; and voltages are supplied to the secondanalog buffer 176 included in the even-numbered signal driving meansthrough the fourth supply lines V4⁺ and V4⁻. The supply voltagescorresponding to these supply lines are controlled by means of thesupply voltage controller 202 (see FIG. 30) connected to the supplylines. By such control of the supply voltages, analog buffers 170 to 180can switch from use as positive polarity analog buffers to use asnegative polarity analog buffers. Here, positive polarity analog buffersare buffers in which the output voltage range has been shifted to highpotential using the counter voltage (common voltage) as a reference; andnegative polarity analog buffers are buffers in which the output voltagerange has been shifted to low potential using the counter voltage as areference. As mentioned previously, the liquid crystal elements degradeunder direct current driving so that it is necessary to invert thepolarity of the voltage applied to the liquid crystal elements atregular intervals. In the present embodiment, this polarity inversion isrealized by controlling the values of the supply voltages to the analogbuffers through supply lines V1⁺ to V4⁺ and V1⁻ to V4⁻ and switchingbetween positive polarity analog buffers and negative polarity analogbuffers. In this embodiment, it is possible to realize 1V, 1H, 1S, and1H+1S inversion driving from a single liquid crystal driver usingcontrol of supply voltages to supply lines V1⁺ to V4⁺ and V1⁻ to V4⁻ andthe control of switch control lines L1 and L2 described above. How 1V,1H, 1S, and 1H+1S inversion driving can be realized using liquid crystaldrivers having the configuration shown in FIG. 1 will be explainedbelow.

I. 1V Inversion (Frame Inversion) Driving

1V inversion driving is a driving method as shown in FIG. 40A discussedpreviously. Using this driving method, it is possible to suppress thegeneration of line nonuniformity. FIG. 4 is a timing chart for achieving1V inversion driving with the liquid crystal driver of FIG. 1, and FIG.5 explains the liquid crystal driver operation in such a case. In FIG.4, on and off conditions are shown for switches such as SW11 and SW31;but, for the circuit configurations in FIGS. 2 and 3, the on and offconditions shown in FIG. 4 correspond to high level and low level,respectively.

First, as shown in FIG. 4, during the vertical blanking period, switchesSW11, SW31, and SW51 as well as SW21, SW41, and SW61 are all on whileswitches SW12, SW32, and SW52 as well as SW22, SW42, and SW62 are alloff. Accordingly, the display signal voltage is not supplied to thesignal lines.

Additionally, during the vertical blanking period, supply lines V1⁺ toV4⁺ and V1⁻ to V4⁻ are all fixed at ground potential (GND). As a result,the high potential supply VDD and the low potential supply VSS of analogbuffers 170 to 180 are fixed at ground potential. Analog buffers 170 to180 have integrated constant current supplies; and, when there is apotential difference between VDD and VSS, current flows via thisconstant current supply. As in the present example, however, thepotential difference between VDD and VSS vanishes if VDD and VSS arefixed at ground potential; and, since no current flows via the constantcurrent supply, it is possible to decrease power consumption. During thevertical blanking period, even if the analog buffers are not inoperation, switches 130 to 144 are off so that there is no effect on theliquid crystal panel screen display. Meanwhile, since the analog buffersare arranged to correspond to each signal line, if the power consumptionof analog buffers 170 to 180 is decreased, the power consumption of theentire liquid crystal panel can be decreased substantially. As a result,in the reverse case under normal operating conditions, it is possible toincrease the amount of current flowing through the constant currentsupplies in analog buffers 170 to 180 with the result being that theperformance of the analog buffers can be improved and improvements inthe liquid crystal panel display quality are also possible. Further, inthis case, the power supply which fixes VDD and VSS at ground potentialcan also be used when analog buffers 170 to 180 are in normal operatingcondition. Therefore, this embodiment also has the advantage that it isnot necessary to generate a new supply voltage to set VDD and VSS tofixed values. Further, in this embodiment, the reason this type oftreatment can be easily realized is that it is possible to use supplyvoltage controller 202 which is already present for polarity inversionin analog buffers 170 to 180. The choice of fixed potentials for VDD andVSS is not limited to ground potential, and it is possible to usevarious other potentials.

Next, entering the vertical scanning period, during the first horizontalscanning period, switches SW11, SW31, and SW51 as well as SW22, SW42,and SW62 are on while switches SW21, SW41, and SW61 as well as SW12,SW32, and SW52 are off. Under these conditions, switches 104, 106, and108 sequentially turn off during one horizontal scanning period. Thus,video signal voltages sequentially sampled through switches 104, 106,and 108 are sequentially held by capacitors 150, 154, and 158 by passingthrough "on" switches SW11, SW31, and SW51.

At this point, since switches SW12, SW32, and SW52 are off, thetransient state sample and hold voltages are not output to the signallines through analog buffers 170, 174, and 178. Further, althoughswitches SW22, SW42, and SW62 are on, for this case in the presentembodiment, because the scan lines (SCAN in FIG. 4) are unselectedduring the first horizontal scanning period as shown in FIG. 4, anerroneous display does not appear on the liquid crystal panel. In otherwords, in the present embodiment, after the sample and hold during thefirst horizontal scanning period of the vertical scanning period isfinished, when the third switches 130 to 134 or the fourth switches 140to 144 become conducting, the select voltage (voltage to select whetheror not the applied voltage is supplied to the liquid crystal element) iseffective after a sequential delay of one horizontal scanning period. Asa result, the circuit configuration as shown in FIG. 1 is able toprevent an erroneous display even when sample and holding is active.

The control of the select voltage output corresponding to the scan linesis performed by the scan line drivers (gate drivers, scan driving means)not shown in the figure.

In the present embodiment, prior to entering the vertical scanningperiod, the supply lines V1⁺ and V3⁺ as well as V2⁺ and V4⁺ are set to alevel of Vb while V1⁻ and V3⁻ as well as V2⁻ and V4⁻ are set to groundlevel. As a result, all of analog buffers 170 to 180 are negativepolarity analog buffers. In other words, it is possible to establish theanalog buffers such that the output voltage range is shifted to lowerpotentials using the counter voltage (common voltage) as a reference.

Next, entering the second horizontal scanning period, this time switchesSW11, SW31, and SW51 as well as SW22, SW42, and SW62 are off whileswitches SW21, SW41, and SW61 as well as SW12, SW32, and SW52 are on.Under these conditions, switches 104, 106, and 108 sequentially turn offduring one horizontal scanning period; and the sampled video signalvoltages are sequentially held by capacitors 152, 156, and 160.

At this time, since switches SW12, SW32, and SW52 are on, the voltagesheld in capacitors 150, 154, and 158 during the first horizontalscanning period are output to the signal lines through analog buffers170, 174, and 178. In this case, as shown in FIG. 4, because the firstscan line is effective (select), normal display operation is achieved inthe first scan line. Also, because switches SW22, SW42, and SW62 are offat this time, the transient state hold voltages are not output to thesignal lines.

The switching action of the switches as described above is repeateduntil all the scan lines are scanned; and once the last scan line isscanned, the vertical blanking period is again entered and all of V1⁺ toV4⁺ and V1⁻ to V4⁻ are set to ground potential. Following this, prior toentering the next vertical scanning period, supply lines V1⁺ and V3⁺ aswell as V2⁺ and V4⁺ are set to a level of Va while V1⁻ and V3⁻ as wellas V2⁻ and V4⁻ are set to a level of Vd. As a result, all of analogbuffers 170 to 180 are positive polarity analog buffers. In other words,it is possible to establish the analog buffers such that the outputvoltage range is shifted to higher potentials using the counter voltage(common voltage) as a reference. Thus, the analog buffers which were setto negative polarity during the previous vertical scan period are set topositive polarity and 1V inversion driving is achieved.

Here, the relations between Va, Vb, and Vc are, for example,

    Va-Vd=Vb-GND

    Va>Vb

    Vd>GND.

Additionally, if the analog buffers are p-type, the common voltage Vcomcan be set in the neighborhood of Vd for example (see FIG. 34B). In thiscase, Va, Vb, and Vd, are, for example, 20 V, 15 V, and 5 V. On theother hand, if the analog buffers are n-type, the common voltage Vcomcan be set in the neighborhood of Vb for example (see FIG. 34C). ofcourse, the supply voltage shift, as shown in FIG. 34A is also possible,as long as the supply voltage is controlled such that at the least theoutput voltage range of the analog buffers is shifted to higherpotentials or lower potentials using the counter voltage as a reference.

A schematic representation of the operation of 1V inversion driving forthe present embodiment is shown in FIG. 5. The following occurs duringthe first vertical scanning period. First, the voltage held during thefirst horizontal scanning period is buffered in analog buffer 170 andoutput via switch 130 during the second horizontal scanning period.Here, because analog buffer 170 is negative polarity as a result ofsupply voltage control, the output voltage range of analog buffer 170 isalso negative; and negative voltage with respect to the counter voltagereference level is applied to the liquid crystal element. Next, thevoltage sampled and held during the second horizontal scanning period isbuffered by negative polarity analog buffer 172 and output throughswitch 140 during the third horizontal scanning period. This negativevoltage is applied to the liquid crystal element.

Upon entering the second vertical scanning period, analog buffers 170 to180 are all positive polarity as a result of supply voltage control.Consequently, hold voltages are buffered and output by means of positivepolarity analog buffer 170 during the second horizontal scanning periodand positive polarity analog buffer 172 during the third horizontalscanning period. As a result of the above process, 1V inversion (frameinversion) driving can be achieved. In FIG. 5, although an effectivedisplay signal voltage is output for the first time during the secondhorizontal scanning period, even in such a case, as mentionedpreviously, the scan lines are effective after a single horizontalscanning period delay and no ill effects result.

II. 1H Inversion (Scan Line Inversion) Driving

1H inversion driving is a driving method as shown in FIG. 40B discussedpreviously. Using this driving method, liquid crystal panel flicker andcross-talk in the vertical direction can be prevented. Additionally, theappearance of vertical stripes during the display of moving images canalso be prevented. In particular, this method is effective whenemploying non-linear active elements (such as polycrystalline TFTs andMIMs for example) with large off leakage currents. Flicker can besuppressed to a lower level using this driving method in comparison to1S inversion driving. FIG. 6 shows the timing chart for achieving 1Hinversion driving with the liquid crystal driver of FIG. 1. Thedifferences between 1V inversion driving of FIG. 4 and 1H inversiondriving of FIG. 6 are as described below. First, in contrast to thefixed on-off sequence of switches in FIG. 4, the on-off sequence ofswitches in FIG. 6 differs with each vertical scanning period. In otherwords, in FIG. 6, during the first vertical scanning period, switchesSW11, SW31, and SW51 as well as SW22, SW42, and SW62 are initially on,then switches SW21, SW41, and SW61 as well as SW12, SW32, and SW52 turnon. During the second vertical scanning period, however, switches SW21,SW41, and SW61 as well as SW12, SW32, and SW52 are initially on, thenswitches SW11, SW31, and SW51 as well as SW22, SW42, and SW62 turn on.The on-off sequence of switches alternates in this fashion after eachvertical scanning period.

Additionally, the control of supply voltages to analog buffers 170 to180 differs as described below. In FIG. 4, supply voltages to supplylines V1⁺ to V4⁺ and V1⁻ to V4⁻ switch after every vertical scanningperiod from Vb level and ground level to Va level and Vd level. Incontrast, in FIG. 6, V1⁺ and V3⁺ are fixed at Va level, V1⁻ and V3⁻ arefixed at Vd level, V2⁺ and V4⁺ are fixed at Vb level, and V2⁻ and V4⁻are fixed at ground level. Consequently, analog buffers 170, 174, and178 are fixed at positive polarity while analog buffers 172, 176, and180 are fixed at negative polarity.

The operation described above is shown schematically in FIG. 7. As FIG.7 shows, one of the analog buffers which forms half the pair whichoutputs a display signal to a single signal line is of positive polaritywhile the other analog buffer is of negative polarity. That is, analogbuffer 170 is positive and analog buffer 172 is negative. During thesecond horizontal scanning period, the voltage applied to the liquidcrystal is positive since the buffering is accomplished by positivepolarity analog buffer 170; and, during the third horizontal scanningperiod, the voltage applied to the liquid crystal is negative since thebuffering is accomplished by negative polarity analog buffer 172. As aresult, the voltage applied to the liquid crystal changes betweenpositive and negative polarity after each scan line.

Further, during the first vertical scanning period, the sequence ofswitching is such that initially switches 110 and 140 are on, thenswitches 120 and 130 turn on. In contrast, during the second verticalscanning period, the sequence of switching is such that initiallyswitches 120 and 130 are on, then switches 110 and 140 turn on. Thus,the polarity of the liquid crystal applied voltage inverts between thefirst vertical scanning period and the second vertical scanning period.

In the manner above, 1H inversion driving can be achieved.

In order to invert the polarity of the voltage applied to the liquidcrystal after every vertical scanning period, not only the method ofalternating the on-off sequence of switches after each vertical scanningperiod as shown in FIG. 7, but also the method of changing the polarityof all the analog buffers 170 to 180 after each vertical scanning periodas shown in FIG. 8 is acceptable. 1H inversion driving can be achievedthrough this second method as well.

III. 1S Inversion (Signal Line Inversion) Driving

1S inversion driving is a driving method as shown in FIG. 40C discussedpreviously. Using this driving method, liquid crystal panel flicker andcross-talk in the horizontal direction can be prevented. Additionally,the appearance of horizontal stripes during the display of moving imagescan also be prevented. This method is particularly effective forremedying the brightness gradient problem caused by parasitic resistanceof the interconnect electrodes, and is an appropriate driving method forlarge liquid crystal panels. FIG. 9 shows the timing chart for achieving1S inversion driving with the liquid crystal driver of FIG. 1. Thedifferences between 1V inversion driving of FIG. 4 and 1S inversiondriving of FIG. 9 are as described below. Namely, the switch on-offsequence is the same in FIGS. 4 and 9, but the control of supplyvoltages to the analog buffers is different. In FIG. 4, the supplyvoltages switch after each vertical scanning period, but the same supplyvoltage is provided to all analog buffers within a single verticalscanning period. In contrast, in FIG. 9, the voltage supplies for V1⁺and V2⁺ are both at level vb, and the voltage supplies for V1⁻ and V2⁻are both at ground level. Further, the voltage supplies of V3⁺ and V4⁺are both at level Va, and the voltage supplies for V3⁻ and V4⁻ are bothat level Vd. Accordingly, analog buffers 170, 172, 178, and 180 becomenegative, and analog buffers 174 and 176 become positive. In otherwords, when considering the analog buffers in pairs which output displaysignals to a single signal line, both analog buffers have the samepolarity, but the analog buffers of the adjacent pair are both ofopposite polarity to that of the first pair. As a result, it is possibleto invert the polarity of the analog buffers after every signal line.Further, as shown in FIG. 9, since the supply voltages shift after eachvertical scanning period, the polarity of all the analog buffers isinverted after each vertical scanning period.

The operation described above is shown schematically in FIG. 10. As FIG.10 shows, the pair composed of analog buffers 170 and 172 is negative;and the adjacent pair composed of analog buffers 174 and 176 ispositive. Consequently, the polarity of the voltage applied to theliquid crystal is reversed after every signal line. Also, the polarityof the analog buffers is reversed between the first vertical scanningperiod and the second vertical scanning period. In the manner above, isinversion driving can be achieved.

IV. 1H 30 1S inversion (Dot Inversion) Driving

1H+1S inversion driving is a driving method as shown in FIG. 40Ddiscussed previously. Using this driving method, liquid crystal panelflicker and cross-talk in the horizontal and vertical directions can beprevented. Additionally, the brightness gradient problem caused byparasitic resistance of the interconnect electrodes can be solved; and,since there is little current exchange with external circuits, it ispossible to decrease the power consumed by the counter voltagegenerating circuit.

Previously, in order to achieve 1H+1S inversion driving, complicatedcircuits and complicated control was necessary; but, in the presentinvention, it can be realized by a simple circuit such as that shown inFIG. 1.

FIG. 11 shows the timing chart for achieving 1H+1S inversion drivingwith the liquid crystal driver of FIG. 1. The differences between 1Vinversion driving of FIG. 4 and 1H+1S inversion driving of FIG. 11 areas described below. First, in FIG. 11, the switch on-off sequencechanges after each vertical scanning period. For example, in FIG. 11, incontrast to the first vertical scanning period in which switches SW11,SW31, and SW51 are initially on, switches SW11, SW31, and SW51 areinitially off during the second vertical scanning period.

Additionally, the control of supply voltages is also different. Incontrast to the case for FIG. 1 in which the supply voltages switchafter every vertical scanning period, in FIG. 11, V1⁺ and V4⁺ are fixedat level Va; V1⁻ and V4⁻ are fixed at level Vd; V2⁺ and V3⁺ are fixed atlevel Vb; and V2⁻ and V3⁻ are fixed at ground level. As a result, analogbuffers 170, 176, and 178 are fixed at positive polarity while analogbuffers 172, 174, and 180 are fixed at negative polarity.

The operation described above is shown schematically in FIG. 12. As FIG.12 shows, analog buffer 170, which forms half the pair which outputs adisplay signal to a single signal line, is of positive polarity whilethe other analog buffer 172 is of negative polarity. The positive andnegative polarities are transposed for each signal line. For the nextsignal line, analog buffer 174 is negative, and analog buffer 176 ispositive.

Also, during the first vertical scanning period, the sequence is suchthat switches 110 and 140 are initially on, and then switches 120 and130 turn on. In contrast, during the second vertical scanning period,the sequence is such that switches 120 and 130 are initially on, andthen switches 110 and 140 turn on. In this fashion, the polarity of thevoltage applied to the liquid crystal is reversed from the firstvertical scanning period to the second vertical scanning period.

In the manner above, 1H+1S inversion driving can be achieved.

In order to invert the polarity of the voltage applied to the liquidcrystal after each vertical scanning period, not only the method ofalternating the on-off sequence of switches after each vertical scanningperiod as shown in FIG. 12, but also the method of changing the polarityof all the analog buffers 170 to 180 after each vertical scanning periodas shown in FIG. 13 is acceptable. 1H+1S inversion driving can beachieved through this second method as well.

As described above, by means of the present invention, it is possible toachieve all four types of driving methods with the single circuitconfiguration shown in FIG. 1. As a result, it is possible to easilycope with design changes; and it is possible to realize a highlyconventional optimum liquid crystal driver as a standard device in whichthe scale of the circuits is not excessively large.

Second Embodiment

The configuration of a second embodiment of this invention is shown inFIG. 14. The second embodiment relates to a liquid crystal driver fordedicated 1V driving. In this embodiment and those which follow, theshift register, level shifter, and sampling switches are omitted fromthe explanations. As in the first embodiment, there are two switchcontrol lines in the second embodiment. Switching control is achievedthrough switch control line L1 for the first and third switchesincluding 110, 130, 112, 132, 114, and 134 while switching control isachieved through switch control line L2 for the second and fourthswitches including 120, 140, 122, 142, 124, and 144. Although there wasa four-channel supply in the first embodiment, in this second embodimentthere are only V⁺ and V⁻ supply lines forming a single channel system.In other words, all analog buffers 170 to 180 are connected to commonsupply lines; and the supply voltages applied to the common supply linesare controlled by supply voltage controller 202 (see FIG. 30).

FIG. 15 shows the timing chart for achieving 1V inversion driving withthe liquid crystal driver of FIG. 14. The second embodiment operatessimilarly to the operations explained in FIGS. 4 and 5. That is, 1Vinversion driving can be achieved in the second embodiment if the supplyvoltage simply changes after each vertical scanning period such that thepolarity of analog buffers 170 to 180 reverses after each verticalscanning period.

Although, in contrast to the first embodiment, only 1V inversion drivingis possible in the second embodiment, the number of supply lines can bedecreased; the supply voltage control is simple; and the scale of thecircuit can be decreased.

Third Embodiment

The configuration of a third embodiment of this invention is shown inFIG. 16. The third embodiment relates to a liquid crystal driver fordedicated 1H driving. As in the first embodiment, there are two switchcontrol lines in the third embodiment. Although there was a four-channelsupply in the first embodiment, in this third embodiment there areVodd⁺, Vodd⁻, Veven⁺, and Veven⁻ supply lines forming a two-channelsystem. The first analog buffers 170, 174, and 178 receive supplyvoltages from the first supply lines Vodd⁺ and Vodd⁻ whereas the secondanalog buffers 172, 176, and 180 receive supply voltages from the secondsupply lines Veven⁺ and Veven⁻. As a result, analog buffers 170, 174 and178 can be made to differ in polarity from analog buffers 172, 176, and180.

FIG. 17 shows the timing chart for achieving 1H inversion driving withthe liquid crystal driver of FIG. 16. The third embodiment operatessimilarly to the operations explained in FIGS. 6 and 7. In other words,in this third embodiment, by preparing a two channel supply voltage, thetwo analog buffers which form a pair which outputs a display signal to asingle signal line can be made to be of different polarity. Further, theswitch on-off sequence changes after each vertical scanning period. As aresult of these mechanisms, 1H inversion driving can be realized. Incomparison to the first embodiment, the number of supply lines can bedecreased; the supply voltage control is simple; and the scale of thecircuit can be decreased in the third embodiment. Further, using 1Hinversion driving, it is possible to produce high-quality liquid crystaldisplays.

Fourth Embodiment

The configuration of a fourth embodiment of this invention is shown inFIG. 18. The fourth embodiment relates to a liquid crystal driver fordedicated 1S driving. As in the first embodiment, there are two switchcontrol lines in the fourth embodiment. Although there was afour-channel supply in the first embodiment, in this fourth embodimentthere are V12⁺, V12⁻, V34⁺, and V34⁻ supply lines forming a two-channelsystem. The first and second analog buffers 170, 172, 178 and 180included in the odd-numbered signal driving means receive supplyvoltages from the first supply lines V12⁺ and V12⁻ whereas the first andsecond analog buffers 174 and 176 included in the even-numbered signaldriving means receive supply voltages from the second supply lines V34⁺and V34⁻. As a result, analog buffers 170 and 172 as well as 178 and 180can be made to differ in polarity from analog buffers 174 and 176.

FIG. 19 shows the timing chart for achieving 1S inversion driving withthe liquid crystal driver of FIG. 18. The fourth embodiment operatessimilarly to the operations explained in FIGS. 9 and 10. In other words,in this fourth embodiment, first, by preparing a two-channel supplyvoltage, when considering the analog buffers in pairs which outputdisplay signals to a single signal line, both analog buffers in a pairhave the same polarity; but the analog buffers of the adjacent pair areboth of opposite polarity to that of the first pair. Additionally, thesupply voltages are shifted after each vertical scanning period, and thepolarities of all the analog buffers are reversed after every verticalscanning period. As a result, 1S inversion scanning can be realized. Incomparison to the first embodiment, the number of supply lines can bedecreased; the supply voltage control is simple; and the scale of thecircuit can be decreased in the fourth embodiment. Further, using 1Sinversion driving, it is possible to produce high-quality liquid crystaldisplays.

Fifth Embodiment

The configuration of a fifth embodiment of this invention is shown inFIG. 20. The fifth embodiment relates to a liquid crystal driver fordedicated 1H+1S driving. As in the first embodiment, there are twoswitch control lines in the fifth embodiment although the means ofconnection are different from the first embodiment. The switchingcontrol of the first and third switches 110, 130, 114, and 134 includedin the odd-numbered signal driving means as well as the switchingcontrol of the second and fourth switches 122 and 142 included in theeven-numbered signal driving means are controlled by the first switchcontrol line L1. The switching control of the first and third switches112 and 132 included in the even-numbered signal driving means as wellas the switching control of the second and fourth switches 120, 140,124, and 144 included in the odd-numbered signal driving means iscontrolled by the second switch control line L2. Although there was afour-channel supply in the first embodiment, in this fifth embodimentthere are Vodd⁺ , Vodd⁻, Veven⁺, and Veven⁻ supply lines forming atwo-channel system. The first analog buffers 170, 174, and 178 receivesupply voltages from the first supply lines Vodd⁺ and Vodd⁻ whereas thesecond analog buffers 172, 176, and 180 receive supply voltages from thesecond supply lines Veven⁺ and Veven⁻. As a result, analog buffers 170,174, and 178 can be made to differ in polarity from analog buffers 172,176, and 180.

FIG. 21 shows the timing chart for achieving 1H+1S inversion drivingwith the liquid crystal driver of FIG. 20. In addition, FIG. 22schematically shows the operation of this embodiment. First, in thisfifth embodiment, by preparing a two channel supply voltage, the twoanalog buffers which form a pair which outputs a display signal to asingle signal line can be made to be of different polarity. For example,the polarities in pair 170 and 172 and pair 174 and 176 are different.And, grouping the four switches corresponding to a single signal lineinto one group, the switch on-off sequence can be made to differ for theneighboring group of switches. For example, the switch on-off sequencefor switches 110, 120, 130, and 140 is different from that of switches112, 122, 132, and 142. Additionally, the switch on-off sequence changesafter each vertical scanning period. As a result, 1H+1S inversionscanning can be realized.

In order to invert the polarity of the voltage applied to the liquidcrystal after each vertical scanning period, not only the method ofalternating the on-off sequence of switches after each vertical scanningperiod as shown in FIG. 22, but also the method of changing the polarityof all the analog buffers after each vertical scanning period as shownin FIG. 23 is acceptable. 1H+1S inversion driving can be achievedthrough this second method as well.

In comparison to the first embodiment, the number of supply lines can bedecreased; the switch and supply line control is simple; and the scaleof the circuit can be decreased in the fifth embodiment. Further, using1H+1S inversion driving, it is possible to produce high-quality liquidcrystal displays.

Sixth Embodiment

The configuration of a sixth embodiment of this invention is shown inFIG. 24. The sixth embodiment relates to a liquid crystal driver forcombined 1H/1H+1S driving. In contrast to the first embodiment, thereare four switch control lines in the sixth embodiment. Switching controlof the first and third switches 110, 130, 114, and 134 included in theodd-numbered signal driving means is achieved through the first switchcontrol line L1; and switching control of the second and fourth switches120, 140, and 124 included in the odd-numbered signal driving means isachieved through the second switch control line L2. Switching control ofthe first and third switches 112 and 132 included in the even-numberedsignal driving means is achieved through the third switch control lineL3; and switching control of the second and fourth switches 122 and 142included in the even-numbered signal driving means is achieved throughthe fourth switch control line L4. Consequently, it is possible tochange the switch on-off sequence after each vertical scanning period.When the four switches corresponding to a single signal line are groupedtogether, it is also possible to make the switch on-off sequences forneighboring groups of switches different. Although a four-channel supplyvoltage was used in the first embodiment, the sixth embodiment has twochannels including supply lines Vodd⁺, Vodd⁻ and Veven⁺, Veven⁻,respectively. Supply voltages are provided to the first analog buffers170, 174, and 178 by means of the first supply lines Vodd⁺ and Vodd⁻while supply voltages are provided to the second analog buffers 172,176, and 180 by means of the second supply lines Veven⁺ and Veven⁻.Consequently, it is possible for analog buffers 170, 174, and 178 to beof different polarity than analog buffers 172, 176, and 180.

FIG. 25 shows the timing chart for achieving 1H inversion driving withthe liquid crystal driver of FIG. 24. Since the timing chart in FIG. 25is identical to the timing chart in FIG. 17 described previously, adescription of the operating method will be omitted. Further, FIG. 26shows the timing chart for achieving 1H+1S inversion driving with theliquid crystal driver of FIG. 24. Since the timing chart in FIG. 26 isidentical to the timing chart in FIG. 21 described previously, adescription of the operating method will be omitted.

In embodiments 1 through 6 described above, explanations about theconfigurations of drivers for combined 1V/1H/1S/1H+1S driving, dedicated1V driving, dedicated 1H driving, dedicated 1S driving, dedicated 1H+1Sdriving, and combined 1H/1H+1S driving have been presented. Liquidcrystal drivers aside from these can also be achieved using the variousconfigurations presented in embodiments 1 through 6. For example, asshown in FIG. 27, a driver for combined 1V/1S driving (#6) has the sameconfiguration as that shown in FIG. 18 (#3). FIG. 28 shows the timingchart for achieving 1V inversion driving using a combined 1V/1S driver(which has the same configuration as a dedicated 1V driver). As shown inFIG. 28, 1V inversion driving can be achieved by simply providing thesame supply voltages to all the analog buffers, shifting the supplyvoltages after each vertical scanning period, and reversing the polarityof the analog buffers. Similarly, a combined 1V/1H driver (#5) has thesame configuration as that shown in FIG. 16 (#2); and a combined1V/1H+1S driver (#7) has the same configuration as that shown in FIG. 20(#2).

Further, a combined 1V/1H/1H+1S driver (#12) has the same configurationas that shown in FIG. 24 (#9). FIG. 29 shows the timing chart forachieving 1V inversion driving using a combined 1V/1H/1H+1S driver(which has the same configuration as a combined 1H/1H+1S driver). Asshown in FIG. 29, 1V inversion driving can be achieved by simplyproviding the same supply voltages to all the analog buffers, shiftingthe supply voltages after each vertical scanning period, and reversingthe polarity of the analog buffers.

Additionally, drivers for combined 1H/1S driving (#8), combined 1S/1H+1Sdriving (#10), combined 1V/1H/1S driving (#11), combined 1V/1S/1H+1Sdriving (#13), and combined 1H/1S/1H+1S driving (#14) have the sameconfiguration as that shown in FIG. 1 (#15). This is because at least afour-channel supply voltage is necessary in order to achieve both 1Hinversion driving and 1S inversion driving, or both 1S inversion drivingand 1H+1S inversion driving.

Seventh Embodiment

The seventh embodiment relates to liquid crystal driver controlcircuits. FIG. 30 shows an example of the configuration of controlcircuits for controlling combined 1V/1H/1S/1H+1S driver 200. The controlcircuits in this embodiment include supply voltage generator 201, supplyvoltage controller 202, counter 204, switch controller 206, and videosignal generator 208. Supply voltage generator 201 includes buffers 210through 216 and resistances 218 through 222. Voltages VA and VB arevoltage divided by resistances 218 to 222, the divided voltages are thenbuffered by means of buffers 210 to 216, and then output to supplyvoltage controller 202. In this manner, four-channel supply voltages aregenerated for supplying supply lines V1⁺ to V4⁺ and V1⁻ to V4⁻. SignalsDR_(1V), DR_(1S), DRV_(1H), and DRV_(1H+1S) are provided for determiningwhich driving methods of 1V, 1S, 1H, and 1H+1S are to be selected. Basedon signals DR_(1V), DR_(1S), DRV_(1H), and DRV_(1H+1S), supply voltagecontroller 202 controls the values of the supply voltages provided tosupply lines V1⁺ to V4⁺ and V1⁻ to V4⁻. By control of these supplyvoltages, the polarity of the analog buffers can be controlled.Similarly, based on signals DR_(1V), DR_(1S), DRV_(1H), and DRV_(1H+1S),switch controller 206 controls the switch on-off functions using switchcontrol lines L1 and L2. By this type of control, it is possible tocontrol the switch on-off sequences.

Based on signals VSYNC, HSYNC, and EXTCLK, counter 204 controls theon-off functions of switches 230 to 236.

Video signal generator 208, in addition to generating the video signalswhich must be input to combined 1V/1H/1S/1H+1S driver 200 also performslevel shifting and other functions of the generated video signals. Forexample, when the analog buffer output voltage range shifts, it is alsonecessary to shift the video signal voltage level. Video signalgenerator 208 can also perform this type of level shift function.

FIG. 31 shows an example of the configuration of an entire liquidcrystal panel 250 including the combined 1V/1H/1S/1H+1S driver 200. Gatedriver 242 drives scan lines 252 to 258 which are connected to the gateelectrodes of TFT 266. Additionally, combined 1V/1H/1S/1H+1S driver 200drives signal lines 260 and 262 which are connected to the sourceregions of TFT 266. These drivers are controlled by control circuits240, and this control makes possible a liquid crystal display usingliquid crystal 268. In this case in the present embodiment, combined1V/1H/1S/1H+1S driver 200, control circuits 240, and gate driver 242 areintegrated upon liquid crystal panel 250. By means of such integration,it is possible to dramatically decrease the size and cost of a liquidcrystal display. In this case, it is necessary to have these liquidcrystal drivers composed of TFTs as well. Therefore, in this case,particularly, it is desirable to have liquid crystal drivers composed ofrelatively high mobility poly (polycrystalline) silicon TFTs.

Although FIGS. 30 and 31 show the configuration of control circuits andliquid crystal panels corresponding to a combined 1V/1H/1S/1H+1S driver,the configuration of control circuits and liquid crystal panels forother combined drivers or dedicated drivers is the same. Also, althoughFIG. 31 shows liquid crystal drivers and control circuits all integratedon liquid crystal panel 250, it is also acceptable to have only one partintegrated. It is also acceptable to have the combined 1V/1H/1S/1H+1Sdriver composed of single crystal CMOS transistors and provided on theperiphery of the liquid crystal panel.

Eighth Embodiment

When the liquid crystal drivers are integrated on the liquid crystalpanel as in FIG. 31, the analog buffers are comprised of TFTs (thin filmtransistors). The eighth embodiment relates to analog buffers composedof TFTs.

There are differences between TFT analog buffers and single crystal CMOSanalog buffers as described below. First, for TFTs compared to singlecrystal CMOS, the region over which the output voltage is roughly linearwith respect to the input voltage is extremely narrow. In comparison tothe case for single crystal CMOS in which the linear range with respectto supply voltage is about 70%, the range is only about 40% for TFTs.The reasons for this include the fact that for TFTs, the AIDS/AVDS value(IDS is the current between the drain and source, and VDS is the voltagebetween drain and source) in the saturation region of the transistorcharacteristics is large, and the performance of the constant currentsupplies integrated in the buffers are worse than for single crystalCMOS. Additionally, the threshold voltage for TFTs is higher than forsingle crystal CMOS leading to the need for a high voltage of 12 V orhigher for the driving voltage. Finally, the offset values for TFTbuffers are larger than for single crystal CMOS buffers and can bearound 500 mV in the worst case (the offset is about 20 mV for singlecrystal CMOS).

FIG. 32 shows examples of the input and output characteristics forp-type and n-type analog buffers comprised of TFTs. FIGS. 33A and 33Bshow examples of the configuration of p-type and n-type analog buffers,respectively. As shown in FIG. 33A, the p-type analog buffer consists ofthe differentiator 300 (differential stage) and the driver 310 (drivingmeans), and the driver 310 includes p-channel driving transistor 312. Indifferentiator 300, the voltage difference between the input voltage andthe output voltage is amplified. The output of the differentiator 300 isconnected to the gate electrode of the p-channel driving transistor 312,and the output voltage of the p-type analog buffer is output from thedrain region. The output of the p-type analog buffer is input into theminus terminal of differentiator 300 (gate electrode of transistor 308).In other words, this analog buffer is composed of a source followerconnected to an operational amplifier. Transistors 309 and 314 areconstant current sources (or resistances).

As shown in FIG. 33B, the n-type analog buffer consists of thedifferentiator 320 and the driver 330, and the driving region 330includes n-channel driving transistor 334. In this fashion, in thep-type analog buffer the output voltage is driven by p-channeltransistor 312; and, in the n-type analog buffer, the output voltage isdriven by n-channel transistor 334.

As can be understood from the input-output characteristics in FIG. 32,the linear region of TFT analog buffers is extremely narrow. This linearregion occurs at low voltages for p-type analog buffers and at highvoltages for n-type analog buffers. Also, again as shown in FIG. 32, thevalue of the offset voltage Voff is very high for TFT analog buffers.

As mentioned previously, when driving a liquid crystal using analogbuffers, it is necessary to invert the voltage applied to the liquidcrystal with respect to the counter voltage (common voltage). When usinga single buffer to cover the entire voltage range, however, it isnecessary to fabricate the analog buffers with a high break-down voltagethereby leading to an increase in scale and price. On the other hand, itis also possible to consider a method in which a p-type analog buffer isused for negative polarities as shown in FIG. 33A, and an n-type analogbuffer is used for positive polarities as shown in FIG. 33B. Using thismethod, it is possible to fabricate analog buffers with a low break-downprocess. In this method, however, because of differences in thecharacteristics of p-type and n-type analog buffers, the problem ofdisplay quality degradation arises. This is a result of the differencebetween the offset values for p-type and n-type analog buffers whichgives rise to display signal distortion. Additionally, in such a methodwhich mixes p-type and n-type analog buffers, the realization of liquidcrystal drivers which can combine multiple driving means as inembodiments 1 to 6 is difficult.

In order to solve the problems mentioned above, a method which shiftsthe supply voltage from VDDH and VSSH to VDDL and VSSL, or, converselyfrom VDDL and VSSL to VDDH and VSSH as shown in FIG. 34A can beconsidered. In this case, the video signal also is level shifted tomatch these shifts in supply voltage. Consequently, by shifting thesupply voltage to VDDH or VSSH and VDDL or VSSL, it is possible to makethe analog buffers positive or negative, respectively. As a result, itis possible to apply a voltage whose polarity switches between positiveand negative with respect to the counter voltage to the liquid crystalelement. This method is similar to the prior art described in JapaneseUnexamined Patent Application Heisei 6-222741. In this method, VDDH,VDDL, VSSH, and VSSL are symmetric about Vcom.

This method, however, is good when the analog buffers consist of singlecrystal CMOS transistors, but not so good when the analog buffersconsist of TFTs. This is because TFT analog buffers have narrow linearregions as shown in FIG. 32 with the result being that it is necessaryto carry out buffering in the method shown in FIG. 34A using thenonlinear regions. Buffering with nonlinear regions leads to extremedecreases in display quality.

Consequently, in this embodiment, keeping in mind the input and outputcharacteristics of TFT analog buffers as shown in FIG. 32, a methodwhich shifts the supply voltage as shown in FIG. 34B when using p-typeanalog buffers and which shifts the supply voltage as shown in FIG. 34Cwhen using n-type analog buffers is employed. In other words, in thisembodiment, the supply voltages provided to analog buffers, composed ofTFTs, and having linear regions in which the relationship between theinput and output voltages is approximately linear, are controlled. Whenthe input voltage amplitude has been shifted, this supply voltagecontrol can be realized by controlling the high potential and lowpotential supply voltage so that the voltage amplitude is included inthe linear region.

More specifically, in FIG. 34B, let the supply voltages provided to theanalog buffers shift between, for example, VDD=15 V, VSS=0 V and VDD=20V, VSS=5 V. The counter voltage Vcom is about 5 V. Therefore, whenVDD=15 V and VSS=0 V, the analog buffer output voltage range is negativewith respect to Vcom as a reference and the p-type analog buffer becomesa negative polarity analog buffer. Conversely, when VDD=20 V and VSS=5V, the analog buffer output voltage range is positive with respect toVcom as a reference and the p-type analog buffer becomes a positivepolarity analog buffer. By alternately switching the analog bufferpolarity between positive and negative, alternating current driving withrespect to the liquid crystal is possible. In FIG. 35A, the p-typeanalog buffer input/output characteristics are shown when the supplyvoltage shifts as described above. When the p-type analog buffer is usedwith negative polarity, the supply voltage range is as shown by X inFIG. 35A. As can be clearly seen from the figure, because the inputvoltage range from 1 V to 4 V is linear, it is possible to buffer videosignal 340 in FIG. 34B using a linear region and a precise gray-scaledisplay is possible. Further, when the p-type analog buffer is used withpositive polarity, the supply voltage range is as shown by Y in FIG.35A. Here, as can be clearly seen from the figure, because the inputvoltage range from 6 V to 9 V is linear, it is possible to buffer videosignal 342 in FIG. 34B using a linear region and a precise gray-scaledisplay is possible.

Additionally, in this case, the offset values Voffa and Voffb shown inFIG. 35A are the same value. This is because the curves X1 and Y1 inFIG. 35A are curves from the same p-type analog buffer with only asupply voltage shift. When the offset value Voffa when the analog bufferhas negative polarity and the offset value Voffb when the analog bufferhas positive polarity are identical, by adjusting the counter voltageVcom value by only Voffa=Voffb, the effect of the offset voltage can becanceled and it is possible to prevent distortion of the video signalarising from buffering by analog buffers.

As shown in FIG. 34C in which the analog buffer is used as an n-typedevice, it is again possible to buffer the video signal with the linearregion in exactly the same way as described above. The analoginput/output characteristics for this case are shown in FIG. 35B. Whenusing an n-type analog buffer, however, a -10 V supply voltage isnecessary as can be seen clearly in FIG. 34C. Also, when the analogbuffer supply voltage VDD=10 V and VSS=-5 V, video signal 344 swingsbetween 6 V and 9 V. At this point, in order to transmit this videosignal to analog buffers 170 to 180 via switches 104, 106, and 108 inFIG. 1, for example, it is necessary to increase the output of levelshifter 102 to higher than 10 V--for example, a voltage of around 15 Vis necessary. The reason for this is that switches 104, 106, and 108 arenormally composed of n-type transistors and the threshold voltage ofn-type transistors increases as a result of an effect known as the "bodyeffect" when the video signal is in the range of 6 V to 9 V.Consequently, in this case, the liquid crystal drivers require supplyvoltages of -10 V to 15 V leading to a situation in which the TFTscomprising the liquid crystal drivers cannot withstand the voltages. Incontrast, when p-type analog buffers are used, with VDD=20 V and VSS=5V, since the video signal 342 swings within the range of 9 V to 6 V, asupply voltage of 20 V or more is not necessary and switches 104, 106,and 108 can turn on and off by means of the output of level shifter 102without difficulties. Additionally, when VDD=15 V and VSS=0 V, sincevideo signal 340 swings between 1 V and 4 V, switches 104, 106, and 108can turn on and off by means of the output of level shifter 102 withoutdifficulties. As a result, a supply voltage range of 0 V to 20 V isnecessary for the liquid crystal driver and the problem of TFT breakdowncan be prevented. Therefore, in this respect, it is advantageous to usep-type analog buffers rather than n-type analog buffers.

The present invention is not limited to embodiments 1 to 8 describedabove. Various modified embodiments are also possible within the rangeof the main points of this invention.

For example, although the configuration of this embodiment has twoanalog buffers and four switches for each signal line, the presentinvention is not limited to this; and it is possible to use variousother configurations. For example, switches 110 and 120 in FIG. 1 can besubstituted by a single switch or a configuration with three or moreanalog buffers could also be used. Additionally, the analog bufferoutput selection means are not limited to configurations such as thosewith switches 130 and 140.

Further, as for the case in which the select voltage (SCAN in FIG. 4)becomes effective (select) when the applied voltage from the signaldriving means takes effect, the method in which the select voltagebecomes effective after sequentially delaying by a single horizontalscanning period is not limited to liquid crystal driving devices havinga configuration as described in FIG. 1 and others, but is applicable toliquid crystal driving devices with various configurations.

In this invention, it is also acceptable to place the liquid crystaldrivers described in the preceding embodiments at the top and bottomedges of the liquid crystal panel and alternately connect the signallines to the top and bottom drivers. For example, in FIG. 36, the firstand second drivers 400 and 402 are located at the top and bottom ofliquid crystal panel 404 (it is also acceptable to have the liquidcrystal drivers integrated on the liquid crystal panel). Here, combineddrivers described in embodiments 1 and 6 and FIG. 27 operated in the 1Vinversion driving mode, or dedicated 1V drivers described in Embodiment2 are used as the first and second liquid crystal drivers 400 and 402.Odd-numbered signal lines are connected to the signal driving means ofthe first liquid crystal driver 400, and even-numbered signal lines areconnected to the signal driving means of the second liquid crystaldriver 402. The output voltage range of the analog buffers selected bythe signal driving means of the first liquid crystal driver 400 areshifted in the opposite direction from the output voltage range of theanalog buffers selected by the signal driving means of the second liquidcrystal driver 402 using the counter voltage as a reference. By sodoing, as shown in FIG. 36, during the first vertical scanning period,the output of the first liquid crystal driver 400 is positive; and theoutput of the second liquid crystal driver 402 is negative. Then, duringthe second vertical scanning period, the output of the first liquidcrystal driver 400 is negative; and the output of the second liquidcrystal driver 402 is positive. In other words, it is possible toachieve 1S inversion driving as shown in FIG. 40C using the 1V inversiondriving first and second liquid crystal drivers 400 and 402.

On the other hand, FIG. 37 differs from FIG. 36 in that the combineddrivers described in Embodiment 1 and FIG. 27 operated in the 1Hinversion driving mode, or dedicated 1H drivers described in Embodiment3 are used as the first and second liquid crystal drivers 410 and 412.By so doing, as shown in FIG. 37, during the second horizontal scanningperiod of the first vertical scanning period, the outputs of the firstand second liquid crystal drivers 410 and 412 are positive and negative,respectively. During the third horizontal scanning period, the outputsare negative and positive, respectively.

During the second horizontal scanning period of the second verticalscanning period, the outputs of the first and second liquid crystaldrivers 410 and 412 are negative and positive, respectively; and, duringthe third horizontal scanning period, the outputs are positive andnegative, respectively. In other words, it is possible to achieve 1H+1Sinversion driving as shown in FIG. 40D using the 1H inversion drivingfirst and second liquid crystal drivers 410 and 412.

When using analog buffers in liquid crystal drivers as explained inembodiments 1 to 6, for example, it is also not absolutely necessary toshift the supply voltage using the method shown in FIGS. 34B and 34C.For example, it is also permissible to shift the supply voltage by themethod shown in FIG. 34A, and alternate the polarity of the analogbuffers. Especially when the liquid crystal drivers are composed ofsingle crystal CMOS silicon, use of the method in FIG. 34A isappropriate.

The configuration of the analog buffers, too, is not limited to thoseshown in FIG. 33A and FIG. 33B. For example, it is permissible to useconfigurations of the differentiator and driver different from those inFIGS. 33A and 33B.

The shift range of the supply voltage supplied to the analog buffers isalso not restricted to that shown in FIGS. 34B and 34C, and can changedepending on the TFT characteristics and the analog buffer circuitconfigurations.

Further, this invention is not restricted to polycrystalline siliconTFTs, but may also naturally be applied to amorphous (non-crystalline)silicon TFTs.

I claim:
 1. A liquid crystal driving device for driving a plurality ofliquid crystal elements arrayed in a matrix by supplying a voltage to afirst side of selected ones of the liquid crystal elements and supplyinga counter voltage to a second side of the selected ones of the liquidcrystal elements, comprising:at least one signal driving means,including means for sequentially sampling and holding video signals,analog buffers to which are applied high potential and low potentialsupply voltages for buffering sample and hold voltages, and selectionmeans for selecting any output from said analog buffers; supply voltagecontrol means for controlling values of said high potential supplyvoltage and said low potential supply voltage which are supplied to saidanalog buffers, and for shifting a range of an output voltage of saidanalog buffers to one of high potential and low potential based on saidcounter voltage; and selection control means for controlling theselection by said selection means of any output of said analog buffersin which the output voltage range is shifted by said supply voltagecontrol means.
 2. A liquid crystal driving device for driving aplurality of liquid crystal elements arrayed in a matrix by supplying avoltage to a first side of selected ones of the liquid crystal elementsand supplying a counter voltage to a second side of the selected ones ofthe liquid crystal elements, comprising:at least one signal drivingmeans including means for sequentially sampling and holding videosignals, a first and second switching means, a first analog buffer whichbuffers and outputs a first voltage which is transmitted via said firstswitching means, a second analog buffer which buffers and outputs asecond voltage which is transmitted via said second switching means, athird switching means which is connected to an output of said firstanalog buffer and which turns on and off in conjunction with said secondswitching means, and a fourth switching means which is connected to anoutput of said second analog buffer and which turns on and off inconjunction with said first switching means; supply voltage controlmeans which controls values of a high potential supply voltage and a lowpotential supply voltage which are supplied to inputs of said first andsecond analog buffers and which shifts a range of the output voltage ofsaid first and second analog buffers to one of high potential and lowpotential based on said counter voltage; and switch control means whichcontrols the on and off operations of said first through fourthswitching means.
 3. The liquid crystal driving device of claim 2,further comprising frame inversion driving means for switching the shiftdirections of said output voltage range of said first and second analogbuffers each vertical scanning period via control of said supply voltagecontrol means.
 4. The liquid crystal driving device of claim 2, furthercomprising first scan line inversion driving means for switching shiftdirections of the output voltage range of said first and second analogbuffers, which are included in a single said signal driving means, sothat the shift directions differ from one another via control of saidsupply voltage control means and second scan line inversion drivingmeans for switching the on-off sequence of said first through fourthswitching means each vertical scanning period via control of said switchcontrol means.
 5. The liquid crystal driving device of claim 2, furthercomprising:scan line inversion driving means for shifting directions ofthe output voltage range of said first and second analog buffers, whichare included in a single said signal driving means, so that the shiftdirections differ from one another; and scan line inversion drivingmeans for switching the shift directions of the output voltage range ofsaid first and second analog buffers each vertical scanning period viacontrol of said supply voltage control means.
 6. The liquid crystaldriving device of claim 2, further comprising:first signal lineinversion driving means for shifting directions of the output voltagerange of said first and second analog buffers, which are included in asingle said signal driving means, so that the shift directions remainconstant; second signal line inversion driving means for shiftingdirections of the output voltage range of said first and second analogbuffers, which are included in the adjacent said signal driving means,so that the shift directions differ; and means for switching the shiftdirections of the output voltage range of said first and second analogbuffers each vertical scanning period via control of said switch controlmeans.
 7. The liquid crystal driving device of claim 2, furthercomprising:first dot inversion driving means for shifting directions ofthe output voltage range of said first and second analog buffers, whichare included in a single said signal driving means, so that the shiftdirections differ from one another via control of said supply voltagecontrol means; second dot inversion driving means for shiftingdirections of the output voltage range of said first and second analogbuffers, which are included in the adjacent said signal driving means,so that the shift directions also differ from one another; and means forswitching the on-off sequence of said first through fourth switchingmeans each vertical scanning period via control of said switch controlmeans.
 8. The liquid crystal driving device of claim 2, furthercomprising:first dot inversion driving means for shifting directions ofthe output voltage range of said first and second analog buffers, whichare included in a single said signal driving means, so that the shiftdirections differ from one another; second dot inversion driving meansfor shifting directions of the output voltage range of said first andsecond analog buffers, which are included in the adjacent said signaldriving means, so that the shift directions also differ from oneanother; and means for switching the shift directions of the outputvoltage range of said first and second analog buffers each verticalscanning period via control of said supply voltage control means.
 9. Theliquid crystal driving device of claim 2, further comprising:dotinversion driving means for shifting directions of the output voltagerange of said first and second analog buffers, which are included in asingle said signal driving means, so that the shift directions differfrom one another via control of said supply voltage control means; andmeans for making the on-off sequence of said first through fourthswitching means, which are included in the adjacent said signal drivingmeans different from one another via control of said switch controlmeans; and means for switching the on-off sequence of said first throughfourth switching means each vertical scanning period via control of saidswitch control means.
 10. The liquid crystal driving device of claim 2,further comprising:dot inversion driving means for making the shiftdirections of the output voltage range of said first and second analogbuffers, which are included in a single said signal driving means,differ from one another; means for switching the shift directions of theoutput voltage range of said first and second analog buffers eachvertical scanning period via control of said supply voltage controlmeans; and means for making the on-off sequences of said first throughfourth switching means, which are included in the adjacent said signaldriving means, different from one another via the control of said switchcontrol means.
 11. The liquid crystal driving device of claim 2,whereinsaid supply voltage control means includes a means for controlling: afirst supply line, which supplies a high potential supply voltage and alow potential supply voltage to said first analog buffer, and isincluded in the at least one signal driving means; a second supply line,which supplies a high potential supply voltage and a low potentialsupply voltage to said second analog buffer, and is included in the atleast one signal driving means; a third supply line, which supplies ahigh potential supply voltage and a low potential supply voltage to saidfirst analog buffer, and is included in the at least one signal drivingmeans; a fourth supply line, which supplies a high potential supplyvoltage and a low potential supply voltage to said second analog buffer,and is included in the at least one signal driving means; and values ofthe high potential supply voltage and the low potential supply voltagesupplied to said first through fourth supply lines; and said switchcontrol means includes a means for controlling: a switch control line 1,which controls the switching of said first and third switching means; aswitch control line 2, which controls the switching of said second andfourth switching means; and switch signals supplied to said switchcontrol lines 1 and
 2. 12. The liquid crystal driving device of claim 2,wherein said supply voltage control means includes a means forcontrolling:a supply line which supplies a high potential supply voltageand a low potential supply voltage to the first and second analogbuffers; and a value of the high potential supply voltage and the lowpotential supply voltage supplied to said supply line; and said switchcontrol means includes a means for controlling: a switch control line 1,which controls the switching of said first and third switching means; aswitch control line 2, which controls the switching of said second andfourth switching means; and a switch signal supplied to said switchcontrol lines 1 and
 2. 13. The liquid crystal driving device of claim 2,wherein said supply voltage control means includes a means forcontrolling:a first supply line, which supplies a high potential supplyvoltage and a low potential supply voltage to said first analog buffer;a second supply line, which supplies a high potential supply voltage anda low potential supply voltage to said second analog buffer; and a valueof the high potential supply voltage and the low potential supplyvoltage supplied to said first and second supply lines; and said switchcontrol means includes a means for controlling: a switch control line 1,which controls the switching of said first and third switching means; aswitch control line 2, which controls the switching of said second andfourth switching means; and a switch signal supplied to said first andsecond switch control lines.
 14. The liquid crystal driving device ofclaim 2, wherein said supply voltage control means includes a means forcontrolling:a first supply line, which supplies a high potential supplyvoltage and a low potential supply voltage to said first and secondanalog buffers, included in the at least one signal driving means; asecond supply line, which supplies a high potential supply voltage and alow potential supply voltage to said first and second analog buffers,included in the at least one signal driving means; and a value of thehigh potential supply voltage and the low potential supply voltagesupplied to said first and second supply lines; and said switch controlmeans includes a means for controlling: a switch control line 1, whichcontrols the switching of said first and third switching means; a switchcontrol line 2, which controls the switching of said second and fourthswitching means; and a switch signal supplied to said switch controllines 1 and
 2. 15. The liquid crystal driving device of claim 2, whereinsaid supply voltage control means includes a means for controlling:afirst supply line, which supplies a high potential supply voltage and alow potential supply voltage to said first analog buffer; a secondsupply line, which supplies a high potential supply voltage and a lowpotential supply voltage to said second analog buffer; and a value ofthe high potential supply voltage and the low potential supply voltagesupplied to said first and second supply lines; and said switch controlmeans includes a means for controlling: a switch control line 1, whichcontrols the switching of the first and third switching means includedin the at least one signal driving means; and the second and fourthswitching means included in the at least one signal driving means; aswitch control line 2, which controls the switching of the first andthird switching means included in the at least one signal driving means,and the second and fourth switching means included in the at least onesignal driving means; and a switch signal supplied to said switchcontrol lines 1 and
 2. 16. The liquid crystal driving device of claim 2,wherein said supply voltage control means includes a means forcontrolling:a first supply line, which applies a high potential supplyvoltage and a low potential supply voltage to said first analog buffer;a second supply line, which applies a high potential supply voltage anda low potential supply voltage to said second analog buffer; and a valueof the high potential supply voltage and the low potential supplyvoltage supplied to said first and second supply lines; and said switchcontrol means includes a means for controlling: a switch control line 1,which controls the switching of the first and third switching meansincluded in the at least one signal driving means; a switch control line2, which controls the switching of the second and fourth switching meansincluded in the at least one signal driving means; a switch control line3, which controls the switching of the first and third switching meansincluded in the at least one signal driving means; a switch control line4, which controls the switching of the second and fourth switching meansincluded in the at least one signal driving means; and a switch signalsupplied to said switch control lines 1 through
 4. 17. The liquidcrystal driving device of claim 2, further comprising a scan drivingmeans which outputs a selection voltage to the scan lines in order toselect whether to apply said voltage to said selected ones of saidliquid crystal elements; andsaid scan driving means enables saidselection voltage by sequentially delaying the select voltage by onehorizontal scanning period so that said selection voltage becomeseffective when one of said third switching means and said fourthswitching means becomes conductive after completion of thesample-and-hold in the first horizontal scanning period of the verticalscanning period.
 18. The liquid crystal driving device of claim 1,wherein said supply voltage control means includes means for fixing at aprescribed value said high potential supply voltage and said lowpotential supply voltage at a time of a vertical blanking period. 19.The liquid crystal driving device of claim 2, wherein said supplyvoltage control means includes means for fixing at a prescribed valuesaid high potential supply voltage and said low potential supply voltageat a time of a vertical blanking period.
 20. The liquid crystal drivingdevice of claim 1, wherein the analog buffers comprise:thin filmtransistors having a linear region in which a relationship of saidoutput voltage to an input voltage is approximately linear and whereinsaid supply voltage control means controls the value of said highpotential supply voltage and said low potential supply voltage so thatan amplitude of said input voltage is included in said linear regionwhen the amplitude of said input voltage shifts.
 21. The liquid crystaldriving device of claim 2, wherein the first and second analog buffercomprise:thin film transistors having a linear region in which arelationship of said output voltage to an input voltage is approximatelylinear and wherein said supply voltage control means controls the valueof said high potential supply voltage and said low potential supplyvoltage so that an amplitude of said input voltage is included in saidlinear region when the amplitude of said input voltage shifts.
 22. Theliquid crystal driving device of claim 20, wherein the analog buffersinclude:a differential stage in which said input voltage and said outputvoltage are input and in which a voltage difference between the inputvoltage and the output voltage is amplified and output; driving means inwhich the output of said differential stage is input to the gateelectrode, said driving means including an n-channel driving transistorwhich outputs said output voltage from the drain region; and whereinsaid supply voltage control means shifts a value of said high potentialsupply voltage and said low potential supply voltage to the lowpotential side so that when an amplitude of said input voltage shifts tothe low potential side said amplitude is included in said linear regionwhich is located on the high potential side.
 23. The liquid crystaldriving device of claim 21, wherein the first and second analog buffersinclude:a differential stage in which said input voltage and said outputvoltage are input and in which a voltage difference between the inputvoltage and the output voltage is amplified and output; driving means inwhich the output of said differential stage is input to the gateelectrode, said driving means including an n-channel driving transistorwhich outputs said output voltage from the drain region; and said supplyvoltage control means shifts a value of said high potential supplyvoltage and said low potential supply voltage to the low potential sideso that when an amplitude of said input voltage shifts to the lowpotential side, said amplitude is included in said linear region whichis located on the high potential side.
 24. The liquid crystal drivingdevice of claim 20, wherein the analog buffers include:a differentialstage in which said input voltage and said output voltage are input andin which a voltage difference between the input voltage and the outputvoltage is amplified and output; driving means in which the output ofsaid differential stage is input to the gate electrode, said drivingmeans including a p-channel driving transistor which outputs said outputvoltage from the drain region; and wherein said supply voltage controlmeans shifts a value of said high potential supply voltage and said lowpotential supply voltage to the high potential side so that when anamplitude of said input voltage shifts to the high potential side, saidamplitude is included in said linear region which is located on the lowpotential side.
 25. The liquid crystal driving device of claim 21,wherein the first and second analog buffer include:a differential stagein which said input voltage and said output voltage are input and inwhich a voltage difference between the input voltage and the outputvoltage is amplified and output; driving means in which the output ofsaid differential stage is input to the gate electrode, said drivingmeans including a p-channel driving transistor which outputs said outputvoltage from the drain region; and wherein said supply voltage controlmeans shifts a value of said high potential supply voltage and said lowpotential supply voltage to the high potential side so that when anamplitude of said input voltage shifts to the high potential side, saidamplitude is included in said linear region which is located on the lowpotential side.
 26. The liquid crystal driving device of claim 20further comprising means for canceling an offset value of said analogbuffers by adjusting a value of said counter voltage.
 27. The liquidcrystal driving device of claim 21 further comprising means forcanceling an offset value of said first and second analog buffers byadjusting a value of said counter voltage.
 28. A liquid crystal displaydevice including at least one liquid crystal driving device as recitedin claim 1, further comprising:signal lines connected to a signaldriving means of the at least one liquid crystal driving device; scanlines which intersect at the signal lines; liquid crystal elementsarrayed in a matrix; and thin film transistors for transmitting appliedvoltage to the liquid crystal elements.
 29. A liquid crystal displaydevice including first and second liquid crystal driving devices asrecited in claim 1, further comprising:signal lines connected to one ofthe signal driving means of the first liquid crystal driving devices andthe signal driving means of the second liquid crystal driving devices;scan lines which intersect at the signal lines; liquid crystal elementsarrayed in a matrix; and thin film transistors for transmitting appliedvoltage to the liquid crystal elements; means for connecting at leastone signal line to the signal driving means of said first liquid crystaldriving devices; means for connecting another signal line to the signaldriving means of said second liquid crystal driving device; and meansfor shifting in an opposite direction, with reference to the countervoltage, an output voltage range of the analog buffer selected in thesignal driving means connected to the at least one signal line withrespect to the output voltage range of the analog buffer selected in thesignal driving means connected to another signal line.
 30. The liquidcrystal display device of claim 28, wherein said liquid crystal drivingdevice is integrated on a liquid crystal panel, which comprises saidthin film transistors.
 31. The liquid crystal display device of claim29, wherein said liquid crystal driving device is integrated on a liquidcrystal panel, which comprises said thin film transistors.
 32. An analogbuffer, comprising:thin film transistors, to which a high potentialsupply voltage and a low potential supply voltage are supplied and whichbuffers an input voltage and outputs an output voltage, said thin filmtransistors having a linear region in which a relationship of saidoutput voltage to said input voltage is approximately linear; and supplyvoltage control means for controlling the value of said high potentialsupply voltage and said low potential supply voltage so that anamplitude is included in said linear region when a fluctuation range ofsaid input voltage shifts.
 33. The analog buffer of claim 32,including:a differential stage in which said input voltage and saidoutput voltage are input, wherein a voltage difference between the inputvoltage and the output voltage is amplified and output; driving means inwhich the output of said differential stage is input to a gateelectrode, said driving means further including an n-channel drivingtransistor which outputs said output voltage from a drain region; andsaid supply voltage control means shifts to a low potential side thevalue of said high potential supply voltage and said low potentialsupply voltage so that when an amplitude of said input voltage shifts tothe low potential side said amplitude is included in said linear regionwhich is located on a high potential side.
 34. The analog buffer ofclaim 32, including:a differential stage in which said input voltage andsaid output voltage are input and a voltage difference between the inputvoltage and the output voltage is amplified and output; driving means inwhich the output of said differential stage is input to a gateelectrode, said driving means further including a p-channel drivingtransistor which outputs said output voltage from a drain region; andsaid supply voltage control means shifts to a high potential side thevalue of said high potential supply voltage and said low potentialsupply voltage so that when an amplitude of said input voltage shifts tothe high potential side, said amplitude is included in said linearregion which is located on a low potential side.
 35. The analog bufferof claim 32, including means for canceling an offset value of saidanalog buffer by adjusting the value of a counter voltage.
 36. A liquidcrystal display device including the analog buffer as recited in claim32, further comprising:at least one liquid crystal driving devicecontaining said analog buffer; signal lines which are connected to asignal driving means of the at least one liquid crystal driving device;scan lines which intersect at the signal lines; liquid crystal elementsarrayed in a matrix; and thin film transistors for transmitting appliedvoltage to the liquid crystal elements.
 37. The liquid crystal displaydevice of claim 36, wherein said at least one liquid crystal drivingdevice is integrated on a liquid crystal panel comprised of said thinfilm transistors.
 38. A liquid crystal driving method for driving aplurality of liquid crystal elements arrayed in a matrix by supplying avoltage to a first side of selected ones of the liquid crystal elementsand supplying a counter voltage to a second side of the selected ones ofthe liquid crystal elements, the method comprising:sequentially samplingand holding video signals, buffering the sampled and held video signalsby means of analog buffers which are supplied a high potential supplyvoltage and a low potential supply voltage, and selecting an output ofthe analog buffers; controlling a value of said high potential supplyvoltage and said low potential supply voltage supplied to said analogbuffers to shift a range of the output voltage of said analog buffers toone of the high potential side and the low potential side based on saidcounter voltage; and controlling the selection of the output of saidanalog buffers in which the output voltage range shifted.
 39. A liquidcrystal driving method for driving a plurality of liquid crystalelements arrayed in a matrix by supplying a voltage to a first side ofselected ones of the liquid crystal elements and supplying a countervoltage to a second side of the selected ones of the liquid crystalelements, the method comprising:sequentially sampling and holding videosignals, transmitting the sampled and held video signals by a first andsecond switching means, buffering voltages transmitted via said firstswitching means with a first analog buffer, buffering a voltagetransmitted via said second switching means with a second analog buffer,transmitting an output from said first analog buffer by a thirdswitching means, which turns on and off in conjunction with said secondswitching means, transmitting an output from said second analog bufferwith a fourth switching means, which turns on and off in conjunctionwith said first switching means; controlling a value of said highpotential supply voltage and said low potential supply voltage suppliedto said first and second analog buffers to shift a range of the outputvoltage of said first and second analog buffers to one of the highpotential side and the low potential side based on said counter voltage;and controlling the on and off operation of said first through fourthswitching means.
 40. A liquid crystal driving method for driving aplurality of liquid crystal elements arrayed in a matrix by supplying avoltage to a first side of selected ones of the liquid crystal elementsand supplying a counter voltage to a second side of the selected ones ofthe liquid crystal elements, the method comprising:outputting an appliedvoltage to a signal line with signal driving means, outputting to a scanline the select voltage for selecting whether or not to supply theapplied voltage to said selected ones of the liquid crystal elementswhen the applied voltage from said signal driving means becomes valid,and sequentially delaying the applied voltage by one horizontal scanningperiod so that said selection voltage becomes effective once the appliedvoltage from said signal driving means becomes valid.